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公开(公告)号：US20210400599A1
公开(公告)日：2021-12-23
申请号：US17304367
申请日：2021-06-18
Applicant: QUALCOMM Incorporated
Inventor： Thawatt GOPAL , Qingxin Chen , Reza Shahidi , Francesco Gatta
Abstract: Apparatus, methods, and computer-readable media for facilitating managing multi-SIM concurrent mode for TDD co-banded or spectrum overlap carriers are disclosed herein. An example method for wireless communication at a user equipment (UE) includes estimating a maximum transmit power for a first subscriber based on a low-noise amplifier (LNA) input power threshold associated with an active receive chain of a second subscriber, where the UE comprises the first subscriber and the second subscriber. The example method also includes transmitting, via an active transmit chain of the first subscriber, an uplink transmission at the first subscriber maximum transmit power based on the first subscriber and the second subscriber operating concurrently, and a transmit power associated with the uplink transmission being greater than the first subscriber maximum transmit power.
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公开(公告)号：US11916587B2
公开(公告)日：2024-02-27
申请号：US17485016
申请日：2021-09-24
Applicant: QUALCOMM Incorporated
Inventor： Hasnain Lakdawala , Ahmed Abbas Mohamed Helmy , Francesco Gatta , Balasubramanian Ramachandran , Ketan Humnabadkar , Andrea Fenaroli
Abstract: Techniques and apparatus are described for reducing power consumption when performing wireless communications by dynamically changing the frequency of a local oscillator signal for a radio frequency (RF) downconversion circuit, based on signal conditions. An example method includes receiving an RF signal and downconverting the RF signal using an oscillating signal with a first frequency at a first time. The method also includes switching to downconverting the RF signal using the oscillating signal with a second frequency, based on a property associated with the RF signal at a second time. The second frequency is a subharmonic of the first frequency.
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公开(公告)号：US11658764B2
公开(公告)日：2023-05-23
申请号：US17124368
申请日：2020-12-16
Applicant: QUALCOMM Incorporated
Inventor： Lai Kan Leung , Aleksandar Miodrag Tasic , Francesco Gatta , Chiewcharn Narathong , Kyle David Holland
CPC classification number: H04K3/22 , H03F3/19 , H03M1/12 , H03F2200/294 , H03F2200/451
Abstract: The disclosure relates to an apparatus including a receiver configured to process a radio frequency (RF) signal to generate a baseband signal; a radio frequency (RF) jammer detector configured to generate a signal indicative of whether an RF jammer is present at an input of the receiver; and a receiver bias circuit configured to generate a supply voltage for the receiver based on the RF jammer indication signal. In another aspect, the apparatus includes constant gain bias circuit to maintain the gain of the receiver constant in response to changes in the supply voltage. In other aspects, the receiver bias circuit may suspend the generating of the supply voltage based on the RF jammer indication signal if the power level of the target received signal is above a threshold. In other aspects, the receiver bias circuit changes the supply voltage during cyclic prefix (CP) intervals between downlink intervals.
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公开(公告)号：US11502717B2
公开(公告)日：2022-11-15
申请号：US17156352
申请日：2021-01-22
Applicant: QUALCOMM Incorporated
Inventor： Matthew Sienko , Peter Shah , Francesco Gatta
IPC: H04B1/40 , H04L27/227
Abstract: A switching mixer array is disclosed for the mixing of a digital LO signal with an analog input signal. Each switching mixer in the array is configured to assume either a first switching state or second switching state responsive to a respective bit of the digital LO signal.
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公开(公告)号：US10944441B2
公开(公告)日：2021-03-09
申请号：US16410322
申请日：2019-05-13
Applicant: QUALCOMM Incorporated
Inventor： Alaaeldien Mohamed Abdelrazek Medra , Francesco Gatta
Abstract: A receiver front end is provided with a bypass mode of operation in which a received carrier-aggregated RF signal bypasses a bandpass filter to drive a broadband low-noise amplifier. The low-noise amplifier amplifies the carrier-aggregated RF signal to form an amplified RF signal.
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Patent Agency Ranking
公开(公告)号：US20190158048A1
公开(公告)日：2019-05-23
申请号：US16200405
申请日：2018-11-26
Applicant: Qualcomm Incorporated
Inventor： Alaaeldien Mohamed Abdelrazek Medra , David Zixiang Yang , Kevin Hsi Huai Wang , Chen Zhai , Francesco Gatta
CPC classification number: H03F9/02 , H03F1/223 , H03F1/565 , H03F3/195 , H03F2200/294
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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公开(公告)号：US20190158040A1
公开(公告)日：2019-05-23
申请号：US16049473
申请日：2018-07-30
Applicant: Qualcomm Incorporated
Abstract: An apparatus is disclosed for enhanced reverse isolation and gain using feedback. The apparatus includes an input node, an amplification node, a feedback node, an output circuit, at least one amplifier circuit, and a feedback circuit. The output circuit is connected between the amplification node and the feedback node. The at least one amplifier circuit is connected between the input node and the amplification node. The at least one amplifier circuit includes an input transistor and a cascode stage. The input transistor has a gate node and a drain node, and the gate node is connected to the input node. The cascode stage is connected between the drain node and the amplification node. The feedback circuit includes at least one feedback capacitor that is connected between the feedback node and the input node.
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公开(公告)号：US12248365B2
公开(公告)日：2025-03-11
申请号：US18183833
申请日：2023-03-14
Applicant: QUALCOMM Incorporated
Inventor： Umesh Srikantiah , Lalan Jee Mishra , Richard Dominic Wietfeldt , Boris Alpin , Francesco Gatta
Abstract: A receiving circuit has a clock generator circuit, a synchronization circuit and a controller. The clock generator circuit is configured to generate a base clock signal with a base frequency. The synchronization circuit is configured to synchronize edges in the base clock signal with edges in a Manchester-encoded data signal received over a serial bus. The controller is configured to detect that a first pulse received from the serial bus has a duration corresponding to a pulse duration defined for a first type of sequence start condition that indicates a first type of transaction during which the Manchester-encoded data signal is received over the serial bus; configure a first timer to expire after a first timeout period; and ignore the first pulse when signaling consistent with the first type of sequence start condition has not been received before the first timer expires.
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公开(公告)号：US12124401B2
公开(公告)日：2024-10-22
申请号：US18155499
申请日：2023-01-17
Applicant: QUALCOMM Incorporated
Inventor： Lalan Jee Mishra , Umesh Srikantiah , Francesco Gatta , Richard Dominic Wietfeldt
CPC classification number: G06F13/4295 , G06F13/24
Abstract: A data communication apparatus comprises a line driver configured to couple the data communication apparatus to a 1-wire serial bus; and a controller configured to: transmit a plurality of synchronization pulses over the 1-wire serial bus after a sequence start condition (SSC) has been transmitted over the 1-wire serial bus, the plurality of synchronization pulses being configured to synchronize one or more receiving devices coupled to the 1-wire serial bus to an untransmitted transmit clock signal; initiate an interrupt handling procedure when the plurality of synchronization pulses is encoded with a first value; and initiate a read transaction or a write transaction with at least one of the one or more receiving devices coupled to the 1-wire serial bus when the plurality of synchronization pulses is encoded with a second value.
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公开(公告)号：US11997616B2
公开(公告)日：2024-05-28
申请号：US17304367
申请日：2021-06-18
Applicant: QUALCOMM Incorporated
Inventor： Thawatt Gopal , Qingxin Chen , Reza Shahidi , Francesco Gatta
CPC classification number: H04W52/346 , H04W52/146
Abstract: Apparatus, methods, and computer-readable media for facilitating managing multi-SIM concurrent mode for TDD co-banded or spectrum overlap carriers are disclosed herein. An example method for wireless communication at a user equipment (UE) includes estimating a maximum transmit power for a first subscriber based on a low-noise amplifier (LNA) input power threshold associated with an active receive chain of a second subscriber, where the UE comprises the first subscriber and the second subscriber. The example method also includes transmitting, via an active transmit chain of the first subscriber, an uplink transmission at the first subscriber maximum transmit power based on the first subscriber and the second subscriber operating concurrently, and a transmit power associated with the uplink transmission being greater than the first subscriber maximum transmit power.
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