公开(公告)号：US20160308355A1

公开(公告)日：2016-10-20

申请号：US14862773

申请日：2015-09-23

Applicant: QUALCOMM Incorporated

Inventor： Burt Lee Price ,  Yeshwant Nagaraj Kolla ,  Neel Shashank Natekar

IPC: H02J1/10

CPC classification number: H02J1/10 ,  H03K5/2481 ,  H03K19/0016 ,  H03K19/00315

Abstract: Automatic voltage switching circuits for providing a higher voltage of multiple supply voltages are disclosed. In one aspect, an automatic voltage switching circuit is configured to generate a compare signal indicating which of a first supply voltage and a second supply voltage is a higher voltage. The automatic voltage switching circuit is further configured to generate first and second select signals based on the compare signal, wherein the first and second select signals are in a voltage domain of the higher voltage. Transistors corresponding to the first and second supply voltages control switching the output voltage to the higher voltage in response to the first and second select signals. Biasing the back-gates of the transistors using the output voltage reduces or avoids forward biasing in the body diodes of the transistors, thus reducing the possibility of the output voltage causing interference on a power supply corresponding to a non-activated transistor.

Abstract translation: 公开了用于提供更高电压的多电源电压的自动电压开关电路。 一方面，自动电压切换电路被配置为产生指示第一电源电压和第二电源电压中的哪一个是较高电压的比较信号。 自动电压切换电路还被配置为基于比较信号产生第一和第二选择信号，其中第一和第二选择信号处于较高电压的电压域中。 对应于第一和第二电源电压的晶体管响应于第一和第二选择信号控制将输出电压切换到较高电压。 使用输出电压来偏置晶体管的背栅极减小或避免晶体管体二极管中的正向偏置，从而降低输出电压对与非激活晶体管相对应的电源产生干扰的可能性。

公开(公告)号：US09960596B2

公开(公告)日：2018-05-01

申请号：US14862773

申请日：2015-09-23

Applicant: QUALCOMM Incorporated

Inventor： Burt Lee Price ,  Yeshwant Nagaraj Kolla ,  Neel Shashank Natekar

IPC: H02J1/00 ,  H02J1/10 ,  H03K5/24 ,  H03K19/003 ,  H03K19/00

CPC classification number: H02J1/10 ,  H03K5/2481 ,  H03K19/0016 ,  H03K19/00315

Abstract: Automatic voltage switching circuits for providing a higher voltage of multiple supply voltages are disclosed. In one aspect, an automatic voltage switching circuit is configured to generate a compare signal indicating which of a first supply voltage and a second supply voltage is a higher voltage. The automatic voltage switching circuit is further configured to generate first and second select signals based on the compare signal, wherein the first and second select signals are in a voltage domain of the higher voltage. Transistors corresponding to the first and second supply voltages control switching the output voltage to the higher voltage in response to the first and second select signals. Biasing the back-gates of the transistors using the output voltage reduces or avoids forward biasing in the body diodes of the transistors, thus reducing the possibility of the output voltage causing interference on a power supply corresponding to a non-activated transistor.

公开(公告)号：US20160308372A1

公开(公告)日：2016-10-20

申请号：US15130549

申请日：2016-04-15

Applicant: QUALCOMM Incorporated

Inventor： Yeshwant Nagaraj Kolla ,  Neel Shashank Natekar ,  Manish Garg

IPC: H02J4/00

CPC classification number: H02J4/00 ,  G06F1/263 ,  G06F1/3296 ,  G11C5/14 ,  Y02D10/171

Abstract: Power rail control systems that include power multiplexing circuits that include cross-current conduction protection are disclosed. Power multiplexing circuit includes supply selection circuits each coupled between a respective supply power rail and an output power rail coupled to a powered circuit. To maintain power to the powered circuit during switching coupling of the output power rail, but while also avoiding current cross-conduction path between supply power rails, diode drop control circuits are provided in supply selection circuits. In diode drop operation mode, the diode drop control circuit associated with a higher voltage supply power rail is configured to regulate voltage supplied by such supply power rail to the output power rail to power the powered circuit. A current cross-conduction path is not created, because diode drop control circuits associated with lower voltage supply power rails are reverse biased to prevent current from flowing through their associated supply selection circuits.

Abstract translation: 公开了包括交叉电流传导保护的功率复用电路的电力轨控系统。 功率复用电路包括电源选择电路，每个电源选择电路分别耦合在相应的供电电源轨和耦合到电源电路的输出电源轨之间。 为了在输出电源轨的开关耦合期间维持供电电路的电力，但是在避免电源电源轨之间的电流交叉导通路径的同时，在电源选择电路中提供二极管降压控制电路。 在二极管降压操作模式中，与更高电压电源轨相关联的二极管降压控制电路被配置为将由这样的供电电源轨提供的电压调节到输出电源轨，以给供电电路供电。 不产生电流交叉导通路径，因为与低电压电源电源轨相关联的二极管降压控制电路被反向偏置以防止电流流过其相关联的电源选择电路。

公开(公告)号：US20160306412A1

公开(公告)日：2016-10-20

申请号：US15087377

申请日：2016-03-31

Applicant: QUALCOMM Incorporated

Inventor： Yeshwant Nagaraj Kolla ,  Neel Shashank Natekar

IPC: G06F1/32

CPC classification number: G06F1/3234 ,  G06F1/263 ,  G06F1/3287 ,  G11C5/063 ,  G11C5/147 ,  Y02D10/171

Abstract: Selective coupling of power rails to memory domain(s) in processor-based system, such as to reduce or avoid the need to provide intentional decoupling capacitance in logic domain(s) is disclosed. To avoid or reduce providing additional intentional decoupling capacitance in logic domain to mitigate voltage droops on logic power rail, power rail selection circuit is provided. The power rail selection circuit is configured to couple memory domain to a logic power rail when the logic power rail can satisfy a minimum operating voltage of memory arrays. The additional intrinsic decoupling capacitance of the memory arrays is coupled to the logic power rail. However, if the operating voltage of the logic power rail is scaled down below the minimum operating voltage of the memory arrays when the logic domain does not need higher operation functionality, the power rail selection circuit is configured to couple the memory domain to separate memory power rail.

Abstract translation: 公开了将电源轨与基于处理器的系统中的存储器域的选择性耦合，例如减少或避免在逻辑域中提供有意的去耦电容的需要。 为了避免或减少在逻辑域中提供额外的故意去耦电容以减轻逻辑电源轨上的电压下降，提供了电力轨道选择电路。 电源轨选择电路被配置为当逻辑电源轨可以满足存储器阵列的最小工作电压时将存储器域耦合到逻辑电源轨。 存储器阵列的附加固有解耦电容耦合到逻辑电源轨。 然而，如果当逻辑域不需要更高的操作功能时，如果逻辑电源轨的工作电压按比例缩小到存储器阵列的最小工作电压以下，则电源轨选择电路被配置为将存储器域耦合到分离的存储器电源 轨。

公开(公告)号：US10684671B2

公开(公告)日：2020-06-16

申请号：US15593809

申请日：2017-05-12

Applicant: QUALCOMM Incorporated

Inventor： Shraddha Sridhar ,  Yeshwant Nagaraj Kolla ,  Neel Shashank Natekar

IPC: G06F1/3296 ,  G11C5/14 ,  H03K19/003 ,  H03K19/00 ,  H02J1/08 ,  G01R19/00

Abstract: Adaptively controlling drive strength of multiplexed power from supply power rails in a power multiplexing system to a powered circuit is disclosed. A power multiplexing circuit in the power multiplexing system includes a plurality of supply selection circuits (e.g., head switches) each coupled between a respective supply power rail and an output power rail coupled to the powered circuit. The power multiplexing circuit is configured to activate a selected supply selection circuit to switch coupling of an associated supply power rail to the output power rail to power the powered circuit. In one example, the supply selection circuits each include a plurality of power switch selection circuits coupled to an associated supply power rail. The power switch selection circuits are configured to be activated and deactivated by a control circuit to adjust drive strength of a multiplexed supply power rail based on operational conditions, which can account for performance variations.

公开(公告)号：US10050448B2

公开(公告)日：2018-08-14

申请号：US15130549

申请日：2016-04-15

Applicant: QUALCOMM Incorporated

Inventor： Yeshwant Nagaraj Kolla ,  Neel Shashank Natekar ,  Manish Garg

IPC: H02J4/00 ,  G06F1/26 ,  G11C5/14 ,  G06F1/32

Abstract: Power rail control systems that include power multiplexing circuits that include cross-current conduction protection are disclosed. Power multiplexing circuit includes supply selection circuits each coupled between a respective supply power rail and an output power rail coupled to a powered circuit. To maintain power to the powered circuit during switching coupling of the output power rail, but while also avoiding current cross-conduction path between supply power rails, diode drop control circuits are provided in supply selection circuits. In diode drop operation mode, the diode drop control circuit associated with a higher voltage supply power rail is configured to regulate voltage supplied by such supply power rail to the output power rail to power the powered circuit. A current cross-conduction path is not created, because diode drop control circuits associated with lower voltage supply power rails are reverse biased to prevent current from flowing through their associated supply selection circuits.

公开(公告)号：US09977480B2

公开(公告)日：2018-05-22

申请号：US15087377

申请日：2016-03-31

Applicant: QUALCOMM Incorporated

Inventor： Yeshwant Nagaraj Kolla ,  Neel Shashank Natekar

IPC: G06F1/32 ,  G06F1/26 ,  G11C5/06 ,  G11C5/14

CPC classification number: G06F1/3234 ,  G06F1/263 ,  G06F1/3287 ,  G11C5/063 ,  G11C5/147 ,  Y02D10/171

Abstract: Selective coupling of power rails to memory domain(s) in processor-based system, such as to reduce or avoid the need to provide intentional decoupling capacitance in logic domain(s) is disclosed. To avoid or reduce providing additional intentional decoupling capacitance in logic domain to mitigate voltage droops on logic power rail, power rail selection circuit is provided. The power rail selection circuit is configured to couple memory domain to a logic power rail when the logic power rail can satisfy a minimum operating voltage of memory arrays. The additional intrinsic decoupling capacitance of the memory arrays is coupled to the logic power rail. However, if the operating voltage of the logic power rail is scaled down below the minimum operating voltage of the memory arrays when the logic domain does not need higher operation functionality, the power rail selection circuit is configured to couple the memory domain to separate memory power rail.

公开(公告)号：US20170346299A1

公开(公告)日：2017-11-30

申请号：US15593809

申请日：2017-05-12

Applicant: QUALCOMM Incorporated

Inventor： Shraddha Sridhar ,  Yeshwant Nagaraj Kolla ,  Neel Shashank Natekar

IPC: H02J4/00 ,  G01R19/00

Abstract: Adaptively controlling drive strength of multiplexed power from supply power rails in a power multiplexing system to a powered circuit is disclosed. A power multiplexing circuit in the power multiplexing system includes a plurality of supply selection circuits (e.g., head switches) each coupled between a respective supply power rail and an output power rail coupled to the powered circuit. The power multiplexing circuit is configured to activate a selected supply selection circuit to switch coupling of an associated supply power rail to the output power rail to power the powered circuit. In one example, the supply selection circuits each include a plurality of power switch selection circuits coupled to an associated supply power rail. The power switch selection circuits are configured to be activated and deactivated by a control circuit to adjust drive strength of a multiplexed supply power rail based on operational conditions, which can account for performance variations.