公开(公告)号：US09263370B2

公开(公告)日：2016-02-16

申请号：US14040223

申请日：2013-09-27

Applicant: QUALCOMM Incorporated

Inventor： Ravindra Vaman Shenoy ,  Kwan-yu Lai ,  Jon Bradley Lasiter ,  Philip Jason Stephanou ,  Donald William Kidwell, Jr. ,  Evgeni Gousev

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L25/065 ,  H01L27/108 ,  H01L23/15 ,  H01L23/498 ,  H01L25/10 ,  H01L25/18 ,  H01L23/50 ,  H01L21/48 ,  H01L23/538

CPC classification number: H01L23/481 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5381 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L27/108 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor device comprising a second surface of a logic die and a second surface of a via bar coupled to a first surface of a substrate, a second surface of a memory die coupled to a first surface of the via bar, a portion of the second surface of the memory die extending over the first surface of the logic die, such that the logic die and the memory die are vertically staggered, and the memory die electrically coupled to the logic die through the via bar. The via bar can be formed from glass, and include through-glass vias (TGVs) and embedded passives such as resistors, capacitors, and inductors. The semiconductor device can be formed as a single package or a package-on-package structure with the via bar and the memory die encapsulated in a package and the substrate and logic die in another package.

Abstract translation: 一种半导体器件，包括逻辑管芯的第二表面和耦合到衬底的第一表面的通孔条的第二表面，耦合到通孔条的第一表面的存储器管芯的第二表面，第二部分的一部分 存储芯片的表面在逻辑管芯的第一表面上延伸，使得逻辑管芯和存储器管芯垂直交错，并且存储器管芯通过通孔电连接到逻辑管芯。 通孔棒可以由玻璃形成，并且包括透玻璃通孔（TGV）和嵌入式无源器件，例如电阻器，电容器和电感器。 半导体器件可以形成为单个封装或封装封装结构，其中通孔棒和存储管芯封装在封装中，并且衬底和逻辑裸片在另一封装中。