公开(公告)号：US20190028087A1

公开(公告)日：2019-01-24

申请号：US15867206

申请日：2018-01-10

申请人： QUALCOMM Incorporated

发明人： Wei ZHUO ,  Timothy Donald GATHMAN ,  Wenbang XU ,  Li-chung CHANG ,  Rui LI ,  Rahul KARMAKER

IPC分类号： H03H11/02

摘要： A filter circuit may include a first path having a first complex baseband filter. The circuit may further include a second path having a second complex baseband filter. The circuit may further include a combiner coupled to an output of the first complex baseband filter and an output of the second complex baseband filter.

公开(公告)号：US20190199290A1

公开(公告)日：2019-06-27

申请号：US15855106

申请日：2017-12-27

申请人： QUALCOMM Incorporated

发明人： Rahul KARMAKER ,  Bin Fan

IPC分类号： H03F1/02 ,  H03F3/193 ,  H03F3/45

CPC分类号： H03F1/0205 ,  H03F3/193 ,  H03F3/4521 ,  H03F3/45237 ,  H03F3/4565 ,  H03F2200/36 ,  H03F2200/411 ,  H03F2200/451 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2200/555 ,  H03F2203/45022 ,  H03F2203/45026 ,  H03F2203/45082 ,  H03F2203/45172 ,  H03F2203/45188 ,  H03F2203/45288 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45494 ,  H03F2203/45508

摘要： Certain aspects of the present disclosure generally relate to a differential amplifier implemented using a complementary metal-oxide-semiconductor (CMOS) structure. The differential amplifier generally includes a first pair of transistors and a second pair of transistors coupled to the first pair of transistors. The gates of the first pair of transistors and gates of the second pair of transistors may be coupled to respective differential input nodes of the differential amplifier, and drains of the first pair of transistors and drains of the second pair of transistors may be coupled to respective differential output nodes of the differential amplifier. In certain aspects, the differential amplifier may include a biasing transistor having a drain coupled to a source of a transistor of the first pair of transistors and having a gate coupled to a common-mode feedback (CMFB) path of the differential amplifier.

公开(公告)号：US20210367623A1

公开(公告)日：2021-11-25

申请号：US16882313

申请日：2020-05-22

申请人： QUALCOMM Incorporated

发明人： Rahul KARMAKER ,  Francesco GATTA

IPC分类号： H04B1/00 ,  H04B1/04

摘要： According to certain aspects, a chip includes a first port, a first amplifier, and a first input path coupling the first port to an input of the first amplifier. The chip also includes a second port, a second amplifier, and a second input path coupling the second port to an input of the second amplifier. The chip further includes a switchable path coupled between the first input path and the second input path.

公开(公告)号：US20170359039A1

公开(公告)日：2017-12-14

申请号：US15178251

申请日：2016-06-09

申请人： QUALCOMM Incorporated

发明人： Rahul KARMAKER

IPC分类号： H03F3/26 ,  H04W84/04 ,  H03F3/45 ,  H01L29/78

CPC分类号： H03F3/265 ,  H01L29/785 ,  H03F3/45 ,  H03F3/45179 ,  H03F3/45197 ,  H03F3/45264 ,  H03F2200/498 ,  H03F2203/45468 ,  H03F2203/45496 ,  H03F2203/45644 ,  H04W84/042

摘要： Certain aspects of the present disclosure generally relate to using cross-coupled transistors for source degeneration of an amplification stage. For example, the amplification stage generally includes a differential amplifier comprising transistors, cross-coupled transistors coupled to the differential amplifier, and an impedance coupled between drains of the cross-coupled transistors. In certain aspects, the differential amplifier comprises a push-pull amplifier, and the transistors of the push-pull amplifier comprise cascode-connected transistors.

公开(公告)号：US20210408989A1

公开(公告)日：2021-12-30

申请号：US17318959

申请日：2021-05-12

申请人： QUALCOMM Incorporated

发明人： Ahmed ABBAS MOHAMED HELMY ,  Mehran BAKHSHIANI ,  Francesco GATTA ,  Hasnain LAKDAWALA ,  Rahul KARMAKER ,  Shankar GUHADOS

IPC分类号： H03F3/45 ,  H03G3/30

摘要： An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and selectively coupling at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.

公开(公告)号：US20180351535A1

公开(公告)日：2018-12-06

申请号：US15609951

申请日：2017-05-31

申请人： QUALCOMM Incorporated

发明人： Rahul KARMAKER ,  Gary Lee BROWN, JR.

IPC分类号： H03H11/04 ,  H03B5/24 ,  H03F3/19

摘要： Certain aspects of the present disclosure are generally directed to a tunable active filter and a method of calibrating a tunable active filter. One example apparatus is a filter circuit that generally includes a resistor-capacitor (RC) topology tunable active filter comprising a first amplifier, a second amplifier, and a feedback path coupled between an input of the first amplifier and an output of the second amplifier. The filter circuit also includes a negative transconductance circuit coupled to a first node of the tunable active filter.