公开(公告)号：US20160197179A1

公开(公告)日：2016-07-07

申请号：US15071789

申请日：2016-03-16

Applicant: Renesas Electronics Corporation

Inventor： Akio TAMAGAWA ,  Makoto TANAKA

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L25/18 ,  H01L27/088 ,  H01L29/417

CPC classification number: H01L29/7813 ,  H01L21/823481 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/18 ,  H01L27/088 ,  H01L29/0615 ,  H01L29/0646 ,  H01L29/086 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/7811 ,  H01L2224/45124 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45099

Abstract: In a semiconductor device, a lightly doped second semiconductor layer of a first conductive type is joined with a heavily doped first semiconductor layer of the first conductive type. A power transistor having a first conductive type channel and a transistor are formed in surface regions of the second semiconductor layer, respectively. A first diffusion layer of a second conductive type is formed in a surface region of the second semiconductor layer to provide a boundary between the power transistor and the transistor. The first semiconductor layer functions as a drain of the power transistor. The first diffusion layer region is set to the same voltage as that of the drain.

公开(公告)号：US20150115359A1

公开(公告)日：2015-04-30

申请号：US14526113

申请日：2014-10-28

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Akio TAMAGAWA ,  Makoto TANAKA

IPC: H01L29/06 ,  H01L27/088

CPC classification number: H01L29/7813 ,  H01L21/823481 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/18 ,  H01L27/088 ,  H01L29/0615 ,  H01L29/0646 ,  H01L29/086 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/7811 ,  H01L2224/45124 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45099

Abstract: In a semiconductor device, a lightly doped second semiconductor layer of a first conductive type is joined with a heavily doped first semiconductor layer of the first conductive type. A power transistor having a first conductive type channel and a transistor are formed in surface regions of the second semiconductor layer, respectively. A first diffusion layer of a second conductive type is formed in a surface region of the second semiconductor layer to provide a boundary between the power transistor and the transistor. The first semiconductor layer functions as a drain of the power transistor. The first diffusion layer region is set to the same voltage as that of the drain.

Abstract translation: 在半导体器件中，第一导电类型的轻掺杂的第二半导体层与第一导电类型的重掺杂的第一半导体层接合。 具有第一导电型沟道和晶体管的功率晶体管分别形成在第二半导体层的表面区域中。 第二导电类型的第一扩散层形成在第二半导体层的表面区域中，以提供功率晶体管和晶体管之间的边界。 第一半导体层用作功率晶体管的漏极。 将第一扩散层区域设定为与漏极相同的电压。