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公开(公告)号:US20250147079A1
公开(公告)日:2025-05-08
申请号:US18883388
申请日:2024-09-12
Applicant: Renesas Electronics Corporation
Inventor: Yoshiaki ISHIZEKI , Makoto TANAKA
IPC: G01R19/165
Abstract: A current sense circuit is provided. The circuit includes a current mirror circuit QN1, QN2, and diode-connected QP1, QP2, QP3, and QP4 with their bases connected together, stacking such that the diode-connected side (QN1, QP1, QP3) aligns and connecting the emitter of QP2 to the collector of QP4. Furthermore, the gates of MP1 and MP2 are connected to the collector of QN2 and QP2, respectively. Additionally, the source of MP1 is connected to the drain of MP3 via the source of MP2 and also connected to the source of a Sense MOS. Moreover, the emitter of QP4 is connected to the source of MP4 via R1, and the drain of MP4 is connected to the source (OUT terminal) of a Main MOS. Furthermore, the gates of MP3 and MP4 are connected to the emitters of QN1 and QN2.
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公开(公告)号:US20220407508A1
公开(公告)日:2022-12-22
申请号:US17349576
申请日:2021-06-16
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Hiroki NAGATOMI , Makoto TANAKA
Abstract: A semiconductor device includes a first transistor that flows a current to a load, a current generation circuit that outputs a current corresponding to a power consumption of the first transistor, a temperature sensor, a resistor-capacitor network coupled between the current generation circuit and the temperature sensor and an overheat detection circuit coupled to a connection point of the current generation circuit and the resistor-capacitor network, wherein the resistor-capacitor network comprises a resistor and a capacitor corresponding to a thermal resistance and a thermal capacitance between the first transistor and the temperature sensor.
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公开(公告)号:US20180306844A1
公开(公告)日:2018-10-25
申请号:US16019050
申请日:2018-06-26
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Keita TAKADA , Nobuya KOIKE , Akihiro NAKAHARA , Makoto TANAKA
IPC: G01R17/16 , H01L29/78 , H01L23/535 , H01L27/02 , G01R19/00 , H01L29/08 , H01L29/417 , H01L27/088 , H01L21/8234
CPC classification number: G01R17/16 , G01R19/0092 , H01L21/823487 , H01L23/535 , H01L27/0207 , H01L27/0251 , H01L27/088 , H01L29/0847 , H01L29/41741 , H01L29/7803 , H01L29/7813 , H01L29/7815 , H01L2224/0603 , H01L2224/32245 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
Abstract: A power MOSFET and a sense MOSFET for detecting a current of the power MOSFET are formed in a semiconductor chip, and a source pad and a Kelvin pad are formed of a source electrode for the power MOSFET. The source pad is a pad for outputting the current flowing to the power MOSFET, and the Kelvin pad is a pad for detecting a source potential of the power MOSFET. The source electrode has a slit, and at least a part of the slit is arranged between the source pad and the Kelvin pad when seen in a plan view.
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公开(公告)号:US20170346274A1
公开(公告)日:2017-11-30
申请号:US15496275
申请日:2017-04-25
Applicant: Renesas Electronics Corporation
Inventor: Akihiro NAKAHARA , Makoto TANAKA
IPC: H02H3/20 , H03K17/687
Abstract: A semiconductor device according to related art has a problem that a clamp voltage that clamps an output voltage cannot adaptively vary in accordance with a power supply voltage, and it is thus not possible to reduce heating of a semiconductor chip to a sufficiently low level. According to one embodiment, a semiconductor device includes a drive circuit (10) that controls on and off of an output transistor (13) and an overvoltage protection circuit (12) that controls a conductive state of the output transistor (13) when an output voltage Vout reaches a clamp voltage, and the overvoltage protection circuit (12) has a circuit structure that sets the clamp voltage to vary in proportion to a power supply voltage VDD.
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公开(公告)号:US20170089957A1
公开(公告)日:2017-03-30
申请号:US15271537
申请日:2016-09-21
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Keita TAKADA , Nobuya KOIKE , Akihiro NAKAHARA , Makoto TANAKA
IPC: G01R17/16 , G01R19/00 , H01L29/08 , H01L27/088 , H01L23/535
CPC classification number: G01R17/16 , G01R19/0092 , H01L21/823487 , H01L23/535 , H01L27/0207 , H01L27/0251 , H01L27/088 , H01L29/0847 , H01L29/41741 , H01L29/7803 , H01L29/7813 , H01L29/7815 , H01L2224/0603 , H01L2224/32245 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
Abstract: A power MOSFET and a sense MOSFET for detecting a current of the power MOSFET are formed in a semiconductor chip, and a source pad and a Kelvin pad are formed of a source electrode for the power MOSFET. The source pad is a pad for outputting the current flowing to the power MOSFET, and the Kelvin pad is a pad for detecting a source potential of the power MOSFET. The source electrode has a slit, and at least a part of the slit is arranged between the source pad and the Kelvin pad when seen in a plan view.
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公开(公告)号:US20150115359A1
公开(公告)日:2015-04-30
申请号:US14526113
申请日:2014-10-28
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Akio TAMAGAWA , Makoto TANAKA
IPC: H01L29/06 , H01L27/088
CPC classification number: H01L29/7813 , H01L21/823481 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/18 , H01L27/088 , H01L29/0615 , H01L29/0646 , H01L29/086 , H01L29/0865 , H01L29/0878 , H01L29/0882 , H01L29/1095 , H01L29/41741 , H01L29/4236 , H01L29/7811 , H01L2224/45124 , H01L2224/48137 , H01L2224/49175 , H01L2224/73265 , H01L2924/00014 , H01L2924/13091 , H01L2924/00 , H01L2224/45099
Abstract: In a semiconductor device, a lightly doped second semiconductor layer of a first conductive type is joined with a heavily doped first semiconductor layer of the first conductive type. A power transistor having a first conductive type channel and a transistor are formed in surface regions of the second semiconductor layer, respectively. A first diffusion layer of a second conductive type is formed in a surface region of the second semiconductor layer to provide a boundary between the power transistor and the transistor. The first semiconductor layer functions as a drain of the power transistor. The first diffusion layer region is set to the same voltage as that of the drain.
Abstract translation: 在半导体器件中,第一导电类型的轻掺杂的第二半导体层与第一导电类型的重掺杂的第一半导体层接合。 具有第一导电型沟道和晶体管的功率晶体管分别形成在第二半导体层的表面区域中。 第二导电类型的第一扩散层形成在第二半导体层的表面区域中,以提供功率晶体管和晶体管之间的边界。 第一半导体层用作功率晶体管的漏极。 将第一扩散层区域设定为与漏极相同的电压。
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公开(公告)号:US20180091068A1
公开(公告)日:2018-03-29
申请号:US15656864
申请日:2017-07-21
Applicant: Renesas Electronics Corporation
Inventor: Naohiro YOSHIMURA , Akihiro NAKAHARA , Makoto TANAKA
Abstract: Provided are an input buffer, a semiconductor device and an engine control unit making it possible to execute fault diagnosis in real time. The input buffer includes a first comparator which compares a voltage of an input signal with a first reference voltage, a hysteresis circuit which generates a first high voltage side or low voltage side reference voltage on the basis of a comparison result from the first comparator, a second comparator which compares the voltage of the input signal with a second reference voltage, and a hysteresis circuit which outputs a second high voltage side reference voltage which is higher than the first high voltage side reference voltage or a second low voltage side reference voltage which is lower than the first low voltage side reference voltage.
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公开(公告)号:US20230318595A1
公开(公告)日:2023-10-05
申请号:US17708862
申请日:2022-03-30
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Hiroki NAGATOMI , Makoto TANAKA
CPC classification number: H03K17/145 , G01K7/01 , B60R16/0207 , H03K17/063 , H03F3/45 , G05F3/26
Abstract: A semiconductor device includes a first transistor that flows a load current to an external load; a current generation circuit that outputs a current corresponding to a power consumption generated in an overheat detection target when the load current flows the overheat detection target; a resistor-capacitor-network comprising a resistor and a capacitor corresponding to a thermal resistance and a thermal capacitance of the overheat detection target, and having one end coupled to the current generation circuit; an overheat detection circuit coupled to a connection point of the current generation circuit and the resistor-capacitor-network; and a voltage source that sets a voltage of the connection point of the current generation circuit and the resistor-capacitor-network to a predetermined voltage.
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公开(公告)号:US20230095018A1
公开(公告)日:2023-03-30
申请号:US17942259
申请日:2022-09-12
Applicant: Renesas Electronics Corporation
Inventor: Naohiro YOSHIMURA , Makoto TANAKA
IPC: H03K17/082 , H03K17/687 , H02H9/04 , H02H9/02 , H02M3/158
Abstract: Detection transistor MNd flows a detection current IdN to a current path CP1n when an output voltage Vo generated in a load terminal PN1 is than a ground voltage GND. A current mirror circuit CMp1 transfers the detection current IdN flowing in the current path CP1n to a current path CP2a. Detecting resistor element Rd1 converts a mirror current I2a flowing in the current path CP2a to a detection voltage Vd1. A control transistor MNc1 is turned on when the converted detection voltage Vd1 is higher than a predetermined value. Then, the output transistor QO is controlled to be off while the control transistor MNc1 is on.
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公开(公告)号:US20160197179A1
公开(公告)日:2016-07-07
申请号:US15071789
申请日:2016-03-16
Applicant: Renesas Electronics Corporation
Inventor: Akio TAMAGAWA , Makoto TANAKA
IPC: H01L29/78 , H01L29/08 , H01L29/10 , H01L29/423 , H01L25/18 , H01L27/088 , H01L29/417
CPC classification number: H01L29/7813 , H01L21/823481 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/18 , H01L27/088 , H01L29/0615 , H01L29/0646 , H01L29/086 , H01L29/0865 , H01L29/0878 , H01L29/0882 , H01L29/1095 , H01L29/41741 , H01L29/4236 , H01L29/7811 , H01L2224/45124 , H01L2224/48137 , H01L2224/49175 , H01L2224/73265 , H01L2924/00014 , H01L2924/13091 , H01L2924/00 , H01L2224/45099
Abstract: In a semiconductor device, a lightly doped second semiconductor layer of a first conductive type is joined with a heavily doped first semiconductor layer of the first conductive type. A power transistor having a first conductive type channel and a transistor are formed in surface regions of the second semiconductor layer, respectively. A first diffusion layer of a second conductive type is formed in a surface region of the second semiconductor layer to provide a boundary between the power transistor and the transistor. The first semiconductor layer functions as a drain of the power transistor. The first diffusion layer region is set to the same voltage as that of the drain.
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