公开(公告)号：US20180294265A1

公开(公告)日：2018-10-11

申请号：US16003478

申请日：2018-06-08

Applicant: Renesas Electronics Corporation

Inventor： Katsumi MORII ,  Yoshitaka OTSU

IPC: H01L27/092 ,  H01L23/528 ,  H01L21/311 ,  H01L21/74 ,  H01L29/78 ,  H01L29/417 ,  H01L29/10 ,  H01L29/06 ,  H01L21/306 ,  H01L21/8238 ,  H01L21/768

CPC classification number: H01L27/0922 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/743 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/823892 ,  H01L23/528 ,  H01L29/0684 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/7827 ,  H01L29/7833 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There is formed a first concave portion that extends inside a semiconductor substrate from a main surface thereof. An insulating film is formed over the main surface, over a side wall and a bottom wall of the first concave portion so as to cover an element and to form a capped hollow in the first concave portion. A first hole portion is formed in the insulating film so as to reach the hollow in the first concave portion from an upper surface of the insulating film, and to reach the semiconductor substrate on the bottom wall of the first concave portion while leaving the insulating film over the side wall of the first concave portion. There is formed a second hole portion that reaches the conductive portion from the upper surface of the insulating film. The first and second hole portions are formed by the same etching treatment.

公开(公告)号：US20170162572A1

公开(公告)日：2017-06-08

申请号：US15438590

申请日：2017-02-21

Applicant: Renesas Electronics Corporation

Inventor： Katsumi MORII ,  Yoshitaka OTSU

IPC: H01L27/092 ,  H01L21/311 ,  H01L21/768 ,  H01L23/528 ,  H01L29/10 ,  H01L29/06 ,  H01L21/8238 ,  H01L21/74 ,  H01L21/306 ,  H01L29/417

CPC classification number: H01L27/0922 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/743 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/823892 ,  H01L23/528 ,  H01L29/0684 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/7827 ,  H01L29/7833 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There is formed a first concave portion that extends inside a semiconductor substrate from a main surface thereof. An insulating film is formed over the main surface, over a side wall and a bottom wall of the first concave portion so as to cover an element and to form a capped hollow in the first concave portion. A first hole portion is formed in the insulating film so as to reach the hollow in the first concave portion from an upper surface of the insulating film, and to reach the semiconductor substrate on the bottom wall of the first concave portion while leaving the insulating film over the side wall of the first concave portion. There is formed a second hole portion that reaches the conductive portion from the upper surface of the insulating film. The first and second hole portions are formed by the same etching treatment.

公开(公告)号：US20150041960A1

公开(公告)日：2015-02-12

申请号：US14455923

申请日：2014-08-10

Applicant: Renesas Electronics Corporation

Inventor： Katsumi MORII ,  Yoshitaka OTSU

IPC: H01L23/48 ,  H01L27/092 ,  H01L29/78 ,  H01L21/768

CPC classification number: H01L27/0922 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/743 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/823892 ,  H01L23/528 ,  H01L29/0684 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/7827 ,  H01L29/7833 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There is formed a first concave portion that extends inside a semiconductor substrate from a main surface thereof. An insulating film is formed over the main surface, over a side wall and a bottom wall of the first concave portion so as to cover an element and to form a capped hollow in the first concave portion. A first hole portion is formed in the insulating film so as to reach the hollow in the first concave portion from an upper surface of the insulating film, and to reach the semiconductor substrate on the bottom wall of the first concave portion while leaving the insulating film over the side wall of the first concave portion. There is formed a second hole portion that reaches the conductive portion from the upper surface of the insulating film. The first and second hole portions are formed by the same etching treatment.

Abstract translation: 在半导体衬底的主表面上形成有第一凹部。 在第一凹部的主表面，侧壁和底壁上形成绝缘膜，以覆盖元件，并在第一凹部中形成封盖的中空部。 在绝缘膜上形成第一孔部，从绝缘膜的上表面到达第一凹部的中空部，并且在离开绝缘膜的同时到达第一凹部的底壁的半导体基板 在第一凹部的侧壁上。 形成有从绝缘膜的上表面到达导电部的第二孔部。 第一和第二孔部分通过相同的蚀刻处理形成。

公开(公告)号：US20130134549A1

公开(公告)日：2013-05-30

申请号：US13725389

申请日：2012-12-21

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuma ONISHI ,  Yoshitaka OTSU ,  Hiroshi KIMURA ,  Tetsuya NITTA ,  Shinichiro YANAGI ,  Katsumi MORII

IPC: H01L29/06

CPC classification number: H01L29/0649 ,  H01L21/764 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/82385 ,  H01L21/823857 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0922 ,  H01L27/11521 ,  H01L27/11526 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66689 ,  H01L29/7816 ,  H01L29/7835

Abstract: A semiconductor device which eliminates the need for high fillability through a simple process and a method for manufacturing the same. A high breakdown voltage lateral MOS transistor including a source region and a drain region is completed on a surface of a semiconductor substrate. A trench which surrounds the transistor when seen in a plan view is made in the surface of the semiconductor substrate. An insulating film is formed over the transistor and in the trench so as to cover the transistor and form an air-gap space in the trench. Contact holes which reach the source region and drain region of the transistor respectively are made in an interlayer insulating film.

Abstract translation: 一种半导体器件，其通过简单的工艺消除了对高填充性的需要及其制造方法。 在半导体衬底的表面上完成包括源极区和漏极区的高击穿电压横向MOS晶体管。 在半导体衬底的表面中制造在平面图中观察时围绕晶体管的沟槽。 在晶体管和沟槽中形成绝缘膜，以覆盖晶体管并在沟槽中形成气隙空间。 到达晶体管的源极区域和漏极区域的接触孔分别制成层间绝缘膜。