公开(公告)号：US11791778B2

公开(公告)日：2023-10-17

申请号：US17894069

申请日：2022-08-23

Applicant: Biamp Systems, LLC

Inventor： Aaron Faulstich

IPC: H03F1/32 ,  G10L25/21 ,  H03G3/30 ,  H03G11/00 ,  H04R3/00 ,  H04R3/02 ,  H04R3/04

CPC classification number: H03F1/3264 ,  G10L25/21 ,  H03G3/3005 ,  H03G11/008 ,  H04R3/007 ,  H04R3/02 ,  H04R3/04 ,  H03G2201/106

Abstract: Example embodiments provide a process that includes one or more of receiving an audio signal from a feedback path of a feedback compressor circuit, determining whether an auxiliary attenuation value applied to the feedback compressor circuit has changed since a last audio signal was received, responsive to determining the auxiliary value has changed, determining a current operational state value of the LPF needs to be modified based on the changed auxiliary attenuation value, modifying the operational state value of the LPF, and applying the audio signal to the modified LPF.

公开(公告)号：US20180337641A1

公开(公告)日：2018-11-22

申请号：US15597937

申请日：2017-05-17

Applicant: Zinwave, Ltd.

Inventor： John Prentice ,  Alessandro Bertoneri ,  Chris Potter

IPC: H03F1/32 ,  H03F3/19 ,  H03G3/20 ,  H04B10/272 ,  H04W88/08 ,  H04B10/2575 ,  H04B10/61

CPC classification number: H03F1/32 ,  H03F3/19 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/411 ,  H03F2200/451 ,  H03G3/20 ,  H03G2201/106 ,  H04B10/25753 ,  H04B10/25754 ,  H04B10/272 ,  H04B10/6163 ,  H04B2210/003 ,  H04B2210/006 ,  H04B2210/252 ,  H04W88/085

Abstract: A system has a plurality of non-linear circuit stages and an intervening linear circuit stage. An input signal is provided to a first non-linear circuit stage, and from the first non-linear circuit stage, to the linear circuit stage. The first non-linear circuit stage applies a second-order distortion to the input signal and provides the resulting signal to the linear circuit stage. The resulting signal that is output from the linear circuit stage is inverted with respect to the input signal and suitably linearly processed (attenuated or amplified). This signal is then provided to a second non-linear circuit that applies a second-order distortion and outputs a signal that has an overall reduction in second-order distortion.

公开(公告)号：US20180191310A1

公开(公告)日：2018-07-05

申请号：US15642484

申请日：2017-07-06

Applicant: Texas Instruments Incorporated

Inventor： Shun QIAN ,  Kim Nordtorp MADSEN ,  Lucia WAN

IPC: H03F1/32 ,  H03F3/181 ,  H03F1/26 ,  H03F3/217 ,  H03G3/20

CPC classification number: H03F1/32 ,  H03F1/26 ,  H03F3/181 ,  H03F3/217 ,  H03F2200/03 ,  H03F2200/471 ,  H03G3/20 ,  H03G2201/106

Abstract: The disclosed embodiments include an audio amplifier system configured to provide a total harmonic distortion (THD) controlled clip detector and an automatic gain limiter (AGL) solution for a closed-loop amplifier. The audio amplifier system is capable of maintaining high power output without hard distortion (i.e., hard clipping) for providing better acoustics, while preventing damage to the system.

公开(公告)号：US20180183409A1

公开(公告)日：2018-06-28

申请号：US15852237

申请日：2017-12-22

Applicant: Texas Instruments Incorporated

Inventor： Rajendrakumar Joish ,  Visvesvaraya Pentakota

IPC: H03H11/24 ,  H03H7/25 ,  H03G1/00 ,  H03K17/687 ,  H01F38/14

CPC classification number: H03H11/245 ,  H01F38/14 ,  H03G1/0088 ,  H03G3/001 ,  H03G3/3052 ,  H03G2201/106 ,  H03H7/25 ,  H03K17/687 ,  H04B1/18

Abstract: The disclosure provides an RF receiver. The RF receiver includes an input driver. The input driver receives a coarse signal, and generates an input signal. A digital step attenuator (DSA) is coupled to the input driver and receives the input signal. An analog to digital converter (ADC) is coupled to the DSA. The DSA includes a serial capacitor coupled to the input driver. The DSA also includes a sampling capacitor coupled to the ADC.

公开(公告)号：US20180138990A1

公开(公告)日：2018-05-17

申请号：US15808358

申请日：2017-11-09

Applicant: SKYWORKS SOLUTIONS, INC.

Inventor： Adrian John Bergsma ,  Peihua Ye ,  Thomas Obkircher ,  Peter Harris Robert Popplewell ,  Gregory Edward Babcock ,  William J. Domino

IPC: H04B15/00 ,  H03G3/30 ,  H03F1/56 ,  H03F3/19 ,  H03F3/72 ,  H04B1/40

CPC classification number: H04B15/00 ,  H03F1/56 ,  H03F3/19 ,  H03F3/72 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2203/7212 ,  H03G3/3042 ,  H03G3/348 ,  H03G2201/106 ,  H04B1/0458 ,  H04B1/18 ,  H04B1/40 ,  H04B1/44

Abstract: Systems and methods are provided for reducing the effects of an impedance mismatch between a communications system and a shared communications medium. A communication system, such as a transceiver within a cable modem, switches between various operating modes including a transmit mode, a receive mode, and a standby mode. The standby mode may be used while the transceiver is in an idle state between modes, such as while changing an amplifier gain states in between transmissions. While transitioning between modes, the impedance presented by the communications system can temporarily fluctuate causing unwanted signal reflections to propagate out of the communications system and on to the shared medium. Circuitry within the communications system, such as transmission circuitry including an adjustable attenuator, may be placed into a hybrid attenuation-isolation mode during the transition causing the magnitude of any unwanted signal reflections to be attenuated and reducing the impact on the shared medium.

公开(公告)号：US20180138878A1

公开(公告)日：2018-05-17

申请号：US15808341

申请日：2017-11-09

Applicant: SKYWORKS SOLUTIONS, INC.

Inventor： William J. Domino ,  Thomas Obkircher ,  Adrian John Bergsma ,  Peihua Ye

IPC: H03G3/30 ,  H03F1/56 ,  H03F1/02 ,  H03F3/195

CPC classification number: H03G3/30 ,  H03F1/0205 ,  H03F1/56 ,  H03F3/195 ,  H03F3/45475 ,  H03F2200/09 ,  H03F2200/294 ,  H03F2200/387 ,  H03F2200/451 ,  H03G1/0088 ,  H03G3/3042 ,  H03G2201/103 ,  H03G2201/106

Abstract: Amplifier systems and methods are provided that include a fixed gain amplification stage coupled to an adjustable attenuation stage further coupled to a variable gain amplification stage. A controller controls an amount of attenuation provided by the adjustable attenuation stage and an amount of gain provided by the variable gain amplification stage to maintain any of various noise, efficiency, and/or linearity requirements of the amplifier system.

公开(公告)号：US09876475B2

公开(公告)日：2018-01-23

申请号：US15344304

申请日：2016-11-04

Applicant: Freescale Semiconductor, Inc.

Inventor： Abdulrhman M. S. Ahmed ,  Mario M. Bokatius ,  Paul R. Hart ,  Joseph Staudinger ,  Richard E. Sweeney

IPC: G06G7/12 ,  H03F1/02 ,  H03F3/21 ,  H03F3/60 ,  G06G7/10 ,  H03F3/68 ,  H03F3/189 ,  H04L7/00 ,  G06F13/42 ,  H03F3/19 ,  H04L27/22 ,  H03G1/00

CPC classification number: H03F1/0288 ,  G06F13/4282 ,  G06G7/10 ,  H03F3/189 ,  H03F3/19 ,  H03F3/211 ,  H03F3/602 ,  H03F3/68 ,  H03F2200/387 ,  H03F2200/438 ,  H03F2200/451 ,  H03F2203/21106 ,  H03F2203/21193 ,  H03G1/0088 ,  H03G2201/106 ,  H04L7/0079 ,  H04L27/22

Abstract: Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

公开(公告)号：US09820073B1

公开(公告)日：2017-11-14

申请号：US15591549

申请日：2017-05-10

Applicant: TLS Corp.

Inventor： Frank Foti

IPC: G06F17/00 ,  H04S5/00 ,  H03G3/30

CPC classification number: H04S5/005 ,  H03G3/3005 ,  H03G3/301 ,  H03G5/165 ,  H03G9/025 ,  H03G2201/106 ,  H04S2400/05 ,  H04S2400/07

Abstract: Extracting a common signal from multiple audio signals may include summing a first signal and a second signal to obtain a first+second signal; subtracting the second signal from the first signal to obtain a first−second signal; transforming the first+second signal and the first−second signal to frequency domain representations; calculating absolute value of the frequency domain representations of the first+second signal and the first−second signal; subtracting the absolute value of the frequency domain representation of the first−second signal from the absolute value of the frequency domain representation of the first+second signal to obtain a difference signal; multiplying the difference signal by the frequency domain representation of the first+second signal to obtain a product signal; dividing the product signal by the absolute value of the frequency domain representation of the first+second signal to obtain a frequency domain representation of the common signal; and transforming the frequency domain representation to the common signal.

公开(公告)号：US09490755B2

公开(公告)日：2016-11-08

申请号：US15184910

申请日：2016-06-16

Applicant: Freescale Semiconductor, Inc.

Inventor： Abdulrhman M. S. Ahmed ,  Mario M. Bokatius ,  Paul R. Hart ,  Joseph Staudinger ,  Richard E. Sweeney

IPC: H03F3/68 ,  H03F1/02 ,  H03F3/21 ,  H03F3/19 ,  H04L7/00 ,  G06F13/42 ,  H04L27/22

CPC classification number: H03F1/0288 ,  G06F13/4282 ,  G06G7/10 ,  H03F3/189 ,  H03F3/19 ,  H03F3/211 ,  H03F3/602 ,  H03F3/68 ,  H03F2200/387 ,  H03F2200/438 ,  H03F2200/451 ,  H03F2203/21106 ,  H03F2203/21193 ,  H03G1/0088 ,  H03G2201/106 ,  H04L7/0079 ,  H04L27/22

Abstract: Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

公开(公告)号：US20140253248A1

公开(公告)日：2014-09-11

申请号：US14287139

申请日：2014-05-26

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： ABDULRHMAN M.S. AHMED ,  MARIO M. BOKATIUS ,  PAUL R. HART ,  JOSEPH STAUDINGER ,  RICHARD E. SWEENEY

IPC: H03F3/21 ,  H03F3/68

CPC classification number: H03F1/0288 ,  G06F13/4282 ,  G06G7/10 ,  H03F3/189 ,  H03F3/19 ,  H03F3/211 ,  H03F3/602 ,  H03F3/68 ,  H03F2200/387 ,  H03F2200/438 ,  H03F2200/451 ,  H03F2203/21106 ,  H03F2203/21193 ,  H03G1/0088 ,  H03G2201/106 ,  H04L7/0079 ,  H04L27/22

Abstract: Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first series circuit and a second series circuit in parallel with the first series circuit. The first series circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first adjustable attenuator series coupled between the first input and the first output. The second series circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter and a second adjustable attenuator series coupled between the second input and the second output.

Abstract translation: 与包括多个放大器路径的放大器一起使用的电路的实施例包括与第一串联电路并联的第一串联电路和第二串联电路。 第一串联电路包括耦合到第一功率分配器输出的第一输入，耦合到多个放大器路径的第一放大器路径的第一输出，以及耦合在第一输入和第二输出之间的第一可调移相器和第一可调衰减器 第一输出。 第二串联电路包括耦合到第二功率分配器输出的第二输入，耦合到多个放大器路径的第二放大器路径的第二输出以及耦合在第二输入和第二输入之间的第二可调移相器和第二可调衰减器串联 第二输出。