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公开(公告)号：US09043530B1
公开(公告)日：2015-05-26
申请号：US13442194
申请日：2012-04-09
CPC分类号： G06F12/0866 , G06F3/0611 , G06F3/065 , G06F3/0656 , G06F3/068 , G06F3/0685 , G06F12/0802 , G06F2003/0691 , G06F2003/0692 , G06F2212/1024 , G06F2212/217 , G06F2212/222 , G06F2212/281
摘要： Among other things, one or more techniques and/or systems are provided for storing data within a hybrid storage aggregate comprising a lower-latency storage tier and a higher-latency storage tier. In particular, frequently accessed data, randomly accessed data, and/or short lived data may be stored (e.g., read caching and/or write caching) within the lower-latency storage tier. Infrequently accessed data and/or sequentially accessed data may be stored within the higher-latency storage tier. Because the hybrid storage aggregate may comprise a single logical container derived from the higher-latency storage tier and the lower-latency storage tier, additional storage and/or file system functionality may be implemented across the storage tiers. For example, deduplication functionality, caching functionality, backup/restore functionality, and/or other functionality may be provided through a single file system (or other type of arrangement) and/or a cache map implemented within the hybrid storage aggregate.
摘要翻译： 除其他之外，提供一个或多个技术和/或系统用于在包括较低延迟存储层和较高延迟存储层的混合存储聚合中存储数据。 特别地，经常访问的数据，随机访问的数据和/或短寿命数据可以在较低延迟存储层内被存储（例如，读取高速缓存和/或写入高速缓存）。 不经常访问的数据和/或顺序访问的数据可以存储在更高延迟的存储层中。 因为混合存储聚合可以包括从较高延迟存储层和较低延迟存储层导出的单个逻辑容器，所以可以跨存储层实现附加的存储和/或文件系统功能。 例如，重复数据删除功能，缓存功能，备份/恢复功能和/或其他功能可以通过单个文件系统（或其他类型的安排）和/或在混合存储聚合中实现的缓存映射来提供。
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2.发明授权Storing data to multi-chip low-latency random read memory device using non-aligned striping 有权使用非对齐条带将数据存储到多芯片低延迟随机读取存储器件公开(公告)号：US07945822B1
公开(公告)日：2011-05-17
申请号：US12430783
申请日：2009-04-27
IPC分类号： G11C29/00
CPC分类号： G06F12/0246 , G06F11/1666 , G06F11/20 , G06F2212/1032 , G06F2212/7208 , G11C29/76
摘要： Described herein are method and apparatus for storing data to a low-latency random read memory (LLRRM) device using non-aligned data striping, the LLRRM device being implemented on a storage system. The LLRRM device may comprise a bank comprising a plurality of memory chips, each chip being simultaneously accessible for storing data on a plurality of erase-units (EUs). A storage operating system may maintain, for each chip, a reserve data structure listing reserve EUs and a remapping data structure for tracking remappings between defective EUs to reserve EUs in the chip. A defective EU in a chip may be mapped to a reserve EU from the reserve data structure. Upon receiving a data block to be stored to the LLRRM device at the defective EU, the storage operating system may stripe the received data block across a plurality of chips in a non-aligned manner using the remapped reserve EU.
摘要翻译： 这里描述了使用非对齐数据条带化将数据存储到低延迟随机读取存储器（LLRRM）装置的方法和装置，LLRRM装置在存储系统上实现。 LLRRM设备可以包括一个包括多个存储器芯片的存储体，每个芯片可以同时访问以存储多个擦除单元（EU）上的数据。 存储操作系统可以为每个芯片保留列出保留EU的备用数据结构和用于跟踪缺陷EU之间的重新映射的重映射数据结构，以在芯片中保留EU。 芯片中的有缺陷的EU可以从保留数据结构映射到保留EU。 在接收到在缺陷EU处存储到LLRRM设备的数据块时，存储操作系统可以使用重新映射的保留EU以不对齐的方式跨越多个芯片对接收到的数据块进行条带化。
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3.发明授权公开(公告)号：US08086914B2
公开(公告)日：2011-12-27
申请号：US13087710
申请日：2011-04-15
IPC分类号： G11C29/00
CPC分类号： G06F12/0246 , G06F11/1666 , G06F11/20 , G06F2212/1032 , G06F2212/7208 , G11C29/76
摘要： Described herein are method and apparatus for storing data to a low-latency random read memory (LLRRM) device using non-aligned data striping, the LLRRM device being implemented on a storage system. The LLRRM device may comprise a bank comprising a plurality of memory chips, each chip being simultaneously accessible for storing data on a plurality of erase-units (EUs). A storage operating system may maintain, for each chip, a reserve data structure listing reserve EUs and a remapping data structure for tracking remappings between defective EUs to reserve EUs in the chip. A defective EU in a chip may be mapped to a reserve EU from the reserve data structure. Upon receiving a data block to be stored to the LLRRM device at the defective EU, the storage operating system may stripe the received data block across a plurality of chips in a non-aligned manner using the remapped reserve EU.
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4.发明授权Method and system for using shared memory with optimized data flow to improve input/output throughout and latency 有权使用共享存储器优化数据流的方法和系统，以改善整个输入/输出和延迟公开(公告)号：US08478835B2
公开(公告)日：2013-07-02
申请号：US12175426
申请日：2008-07-17
IPC分类号： G06F15/167
CPC分类号： G06F12/0868 , G06F3/067 , G06F12/084 , G06F2212/263 , G06F2212/284 , H04L67/1097
摘要： The data path in a network storage system is streamlined by sharing a memory among multiple functional modules (e.g., N-module and D-module) of a storage server that facilitates symmetric access to data from multiple clients. The shared memory stores data from clients or storage devices to facilitate communication of data between clients and storage devices and/or between functional modules, and reduces redundant copies necessary for data transport. It reduces latency and improves throughput efficiencies by minimizing data copies and using hardware assisted mechanisms such as DMA directly from host bus adapters over an interconnection, e.g. switched PCI-e “network”. This scheme is well suited for a “SAN array” architecture, but also can be applied to NAS protocols or in a unified protocol-agnostic storage system. The storage system can provide a range of configurations ranging from dual module to many modules with redundant switched fabrics for I/O, CPU, memory, and disk connectivity.
摘要翻译： 通过在存储服务器的多个功能模块（例如，N模块和D模块）中共享存储器来简化网络存储系统中的数据路径，该存储服务器有助于对来自多个客户端的数据的对称访问。 共享存储器存储来自客户端或存储设备的数据，以促进客户端和存储设备之间和/或功能模块之间的数据通信，并减少数据传输所需的冗余副本。 它通过最小化数据副本并使用诸如DMA之类的硬件辅助机制直接从主机总线适配器（例如，互连）来减少延迟并提高吞吐量效率。 切换PCI-e“网络”。 该方案非常适用于“SAN阵列”架构，也可应用于NAS协议或统一协议无关的存储系统。 存储系统可以提供从双模块到多模块的一系列配置，具有用于I / O，CPU，内存和磁盘连接的冗余交换架构。
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公开(公告)号：US07401093B1
公开(公告)日：2008-07-15
申请号：US10705493
申请日：2003-11-10
IPC分类号： G06F17/00
CPC分类号： G06F17/30088 , Y10S707/99942 , Y10S707/99943 , Y10S707/99944 , Y10S707/99945 , Y10S707/99953
摘要： A system and method for managing file data during consistency points in a file system is provided. A buffer data control structure is modified to include a flags array that tracks various status flags for both a current and a next consistency point (CP). By utilizing multiple pointers within a buffer control structure, the file system may permit write operations to continue to a file undergoing write allocation. Received writes during a write allocation procedure are stored in raw data buffers and the buffer control structure is marked as being dirty for a next CP.
摘要翻译： 提供了一种用于在文件系统中的一致性点期间管理文件数据的系统和方法。 修改缓冲器数据控制结构以包括跟踪当前和下一个一致性点（CP）的各种状态标志的标志数组。 通过利用缓冲器控制结构内的多个指针，文件系统可允许写入操作继续进行正在进行写入分配的文件。 在写入分配过程期间的接收写入被存储在原始数据缓冲器中，并且缓冲器控制结构被标记为对于下一个CP是脏的。
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公开(公告)号：US08621145B1
公开(公告)日：2013-12-31
申请号：US12697129
申请日：2010-01-29
IPC分类号： G06F12/00
CPC分类号： G06F12/12 , G06F12/0246 , G06F2212/222 , G06F2212/7211
摘要： Described is a technique for managing the content of a nonvolatile solid-state memory data cache to improve cache performance while at the same time, and in a complementary manner, providing for automatic wear leveling. A modified circular first-in first-out (FIFO) log/algorithm is generally used to determine cache content replacement. The algorithm is used as the default mechanism for determining cache content to be replaced when the cache is full but is subject to modification in some instances. In particular, data are categorized according to different data classes prior to being written to the cache, based on usage. Once cached, data belonging to certain classes are treated differently than the circular FIFO replacement algorithm would dictate. Further, data belonging to each class are localized to designated regions within the cache.
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7.发明申请STORING DATA TO MULTI-CHIP LOW-LATENCY RANDOM READ MEMORY DEVICE USING NON-ALIGNED STRIPING 有权将数据存储到使用非对齐条带的多芯片低延迟读取存储器件公开(公告)号：US20110196905A1
公开(公告)日：2011-08-11
申请号：US13087710
申请日：2011-04-15
IPC分类号： G06F17/30
CPC分类号： G06F12/0246 , G06F11/1666 , G06F11/20 , G06F2212/1032 , G06F2212/7208 , G11C29/76
摘要： Described herein are method and apparatus for storing data to a low-latency random read memory (LLRRM) device using non-aligned data striping, the LLRRM device being implemented on a storage system. The LLRRM device may comprise a bank comprising a plurality of memory chips, each chip being simultaneously accessible for storing data on a plurality of erase-units (EUs). A storage operating system may maintain, for each chip, a reserve data structure listing reserve EUs and a remapping data structure for tracking remappings between defective EUs to reserve EUs in the chip. A defective EU in a chip may be mapped to a reserve EU from the reserve data structure. Upon receiving a data block to be stored to the LLRRM device at the defective EU, the storage operating system may stripe the received data block across a plurality of chips in a non-aligned manner using the remapped reserve EU.
摘要翻译： 这里描述了使用非对齐数据条带化将数据存储到低延迟随机读取存储器（LLRRM）装置的方法和装置，LLRRM装置在存储系统上实现。 LLRRM设备可以包括一个包括多个存储器芯片的存储体，每个芯片可以同时访问以存储多个擦除单元（EU）上的数据。 存储操作系统可以为每个芯片保留列出保留EU的备用数据结构和用于跟踪缺陷EU之间的重新映射的重映射数据结构，以在芯片中保留EU。 芯片中的有缺陷的EU可以从保留数据结构映射到保留EU。 在接收到在缺陷EU处存储到LLRRM设备的数据块时，存储操作系统可以使用重新映射的保留EU以不对齐的方式跨越多个芯片对接收到的数据块进行条带化。
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公开(公告)号：US07979402B1
公开(公告)日：2011-07-12
申请号：US12771477
申请日：2010-04-30
IPC分类号： G06F7/00
CPC分类号： G06F17/30088 , Y10S707/99942 , Y10S707/99943 , Y10S707/99944 , Y10S707/99945 , Y10S707/99953
摘要： A system and method for managing data during consistency points in a storage system is provided. A buffer data control structure is modified to include a flags array that tracks various status flags for both a current and a next consistency point (CP). By utilizing multiple pointers within a buffer control structure, the storage system may permit write operations to continue to a data container undergoing write allocation. Received writes during a write allocation procedure are stored in raw data buffers and the buffer control structure is marked as being dirty for a next CP.
摘要翻译： 提供了一种用于在存储系统中的一致性点期间管理数据的系统和方法。 修改缓冲器数据控制结构以包括跟踪当前和下一个一致性点（CP）的各种状态标志的标志数组。 通过利用缓冲器控制结构内的多个指针，存储系统可以允许写入操作继续进行经历写入分配的数据容器。 在写入分配过程期间的接收写入被存储在原始数据缓冲器中，并且缓冲器控制结构被标记为对于下一个CP是脏的。
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9.发明授权公开(公告)号：US07783611B1
公开(公告)日：2010-08-24
申请号：US10705025
申请日：2003-11-10
CPC分类号： G06F17/30227
摘要： A system and method for enabling write operations to files undergoing write allocation is provided. The system and method generate a shadow state entry of metadata associated with an inode of the file upon receipt of a write operation. During the write allocation process for the inode, the shadow state information is merged with the data stored in the inode to be written to disk.
摘要翻译： 提供了一种用于对写入分配文件进行写操作的系统和方法。 系统和方法在接收到写入操作时生成与文件的inode相关联的元数据的阴影状态条目。 在inode的写入分配过程中，阴影状态信息与存储在要写入磁盘的inode中的数据合并。
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公开(公告)号：US07739250B1
公开(公告)日：2010-06-15
申请号：US12173104
申请日：2008-07-15
IPC分类号： G06F7/00
CPC分类号： G06F17/30088 , Y10S707/99942 , Y10S707/99943 , Y10S707/99944 , Y10S707/99945 , Y10S707/99953
摘要： A system and method for managing file data during consistency points in a file system is provided. A buffer data control structure is modified to include a flags array that tracks various status flags for both a current and a next consistency point (CP). By utilizing multiple pointers within a buffer control structure, the file system may permit write operations to continue to a file undergoing write allocation. Received writes during a write allocation procedure are stored in raw data buffers and the buffer control structure is marked as being dirty for a next CP.
摘要翻译： 提供了一种用于在文件系统中的一致性点期间管理文件数据的系统和方法。 修改缓冲器数据控制结构以包括跟踪当前和下一个一致性点（CP）的各种状态标志的标志数组。 通过利用缓冲器控制结构内的多个指针，文件系统可允许写入操作继续进行正在进行写入分配的文件。 在写入分配过程期间的接收写入被存储在原始数据缓冲器中，并且缓冲器控制结构被标记为对于下一个CP是脏的。
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