公开(公告)号：US5530398A

公开(公告)日：1996-06-25

申请号：US226126

申请日：1994-04-11

申请人： Daryush Shamlou ,  Edward MacRobbie ,  Rajiv Gupta ,  Raouf Halim

发明人： Daryush Shamlou ,  Edward MacRobbie ,  Rajiv Gupta ,  Raouf Halim

IPC分类号： G05F1/56 ,  H02M3/07 ,  H03L5/00

CPC分类号： H02M3/07

摘要： A circuit for converting a system supply voltage having one of two levels to a voltage for use by an integrated analog circuit connected to the system upon power-up. The circuit uses a diode-connected transistor to generate a reference voltage necessary for a regulator to regulate the supply voltage when the supply voltage is first powered up. The regulated supply voltage is doubled to a voltage level sufficient to activate the integrated analog circuit's bandgap voltage. The activated bandgap voltage is thus switched on to supply a more precise reference voltage to the regulator so that the diode-connected transistor may be de-activated to conserve power. The circuit also provides a bypass path for connecting the supply voltage directly to the integrated analog circuit when the supply voltage is the same level as the necessary voltage for the integrated analog circuit.

摘要翻译： 用于将具有两个电平中的一个的系统电源电压转换为在通电时连接到系统的集成模拟电路使用的电压的电路。 该电路使用二极管连接的晶体管，以在电源电压第一次通电时产生调节器调节电源电压所需的参考电压。 调节的电源电压加倍到足以激活集成模拟电路的带隙电压的电压电平。 因此，激活的带隙电压被接通以向调节器提供更精确的参考电压，使得二极管连接的晶体管可以被去激活以节省功率。 当电源电压与集成模拟电路的必要电压相同时，该电路还提供一个旁路通路，用于将电源电压直接连接到集成模拟电路。

公开(公告)号：US5532576A

公开(公告)日：1996-07-02

申请号：US226197

申请日：1994-04-11

申请人： Edward MacRobbie ,  Daryush Shamlou ,  Rajiv Gupta ,  Raouf Halim

发明人： Edward MacRobbie ,  Daryush Shamlou ,  Rajiv Gupta ,  Raouf Halim

IPC分类号： G06F1/26 ,  G05F1/56 ,  G05F3/30 ,  H02M3/07 ,  G05F1/575

CPC分类号： H02M3/07 ,  Y10S323/901

摘要： An on-board regulated voltage up-convertor for converting a first DC voltage at a first node from an electronic system to a second DC voltage for an integrated device at a second node. The convertor comprises reference generator means for generating a predetermined reference voltage at start-up, voltage regulator means coupled to said first node for regulating said first voltage at a predetermined voltage at a third node, voltage multiplier means coupled to said third node and to said second node for multiplying said predetermined voltage to generate an output voltage substantially equal to said second voltage, feedback means coupled to said second node for feeding said output voltage back to said voltage regulator means to adjust the level of said predetermined voltage at said third node according to how said output voltage is relative to said second voltage.

摘要翻译： 一种车载调节电压上变频器，用于将第一节点处的第一直流电压从电子系统转换为第二节点处的集成装置的第二直流电压。 转换器包括用于在启动时产生预定参考电压的参考发生器装置，耦合到所述第一节点的电压调节器装置，用于在第三节点处以预定电压调节所述第一电压，耦合到所述第三节点的电压倍增器装置和所述第 第二节点，用于乘以所述预定电压以产生基本上等于所述第二电压的输出电压，耦合到所述第二节点的反馈装置，用于将所述输出电压馈送回所述电压调节器装置，以根据所述第三节点调整所述预定电压的电平， 所述输出电压如何相对于所述第二电压。

公开(公告)号：US5514951A

公开(公告)日：1996-05-07

申请号：US226198

申请日：1994-04-11

申请人： Raouf Halim ,  Rajiv Gupta ,  Daryush Shamlou

发明人： Raouf Halim ,  Rajiv Gupta ,  Daryush Shamlou

IPC分类号： G06F1/26 ,  G05F1/56 ,  G05F3/30 ,  H02M3/07 ,  G05F1/40

CPC分类号： H02M3/07 ,  Y10S323/901

摘要： A novel supply discriminator circuit is disclosed for detecting the level of a supply voltage during power-up of a system for configuring an integrated analog circuit such as a PCMCIA card. The circuit compares a reference voltage with a divided down supply voltage and latches the result a predetermined delay later. The delay thus provides timing for the supply voltage to stabilize after power-up to assure accurate detection, as well as noise immunity from other devices.

摘要翻译： 公开了一种新颖的电源鉴别器电路，用于在用于配置诸如PCMCIA卡的集成模拟电路的系统的上电期间检测电源电压的电平。 该电路将参考电压与分压电源电压进行比较，并将结果锁存在预定延迟之后。 延迟因此提供供电电压的定时，以在上电后稳定，以确保准确的检测以及来自其他设备的抗噪声能力。

公开(公告)号：US5463336A

公开(公告)日：1995-10-31

申请号：US186939

申请日：1994-01-27

申请人： Rajiv Gupta ,  Raouf Halim ,  Daryush Shamlou

发明人： Rajiv Gupta ,  Raouf Halim ,  Daryush Shamlou

IPC分类号： G06F1/24 ,  G06F1/30 ,  H03K17/22

CPC分类号： H03K17/22 ,  G06F1/24 ,  G06F1/305

摘要： A circuit for detecting a system reset caused by the turning on of power supply of an electronic system. The circuit comprises: latch means coupled to said power supply having a SET input and an output, said output of said latch means being reset to a first predetermined state during power-on; feedback means for receiving said output from said latch means and said system reset, said feedback means activating its output when both of said first predetermined state from said latch means' output and said system reset are present; delay means coupled to the output from said feedback means and to said latch means, said delay means activating its output a predetermined time after said delay means receiving an activated output from said feedback means, said activated output from said delay means setting said latch means to a second predetermined state such that said feedback means remains de-activated when only said system reset is present without power-on.

摘要翻译： 一种用于检测由电子系统的电源接通引起的系统复位的电路。 电路包括：耦合到具有SET输入和输出的所述电源的锁存装置，所述锁存装置的所述输出在上电期间被复位到第一预定状态; 用于从所述锁存装置接收所述输出和所述系统复位的反馈装置，当来自所述锁存装置的所述第一预定状态和所述系统复位存在时，所述反馈装置激活其输出; 延迟装置，其耦合到来自所述反馈装置和所述锁存装置的输出，所述延迟装置在所述延迟装置接收到所述反馈装置的激活输出之后激活其输出预定时间，所述延迟装置的所述激活输出将所述锁存装置设置为 第二预定状态，使得当仅在所述系统复位而没有上电时，所述反馈装置保持去激活。

公开(公告)号：US5036527A

公开(公告)日：1991-07-30

申请号：US475030

申请日：1990-02-05

申请人： Raouf Halim ,  Daryush Shamlou

发明人： Raouf Halim ,  Daryush Shamlou

IPC分类号： H03G3/20

CPC分类号： H03G3/3052

摘要： An apparatus and method is provided for detecting and amplifying the level of a received signal in the analog front end of a modem so as to maintain the level of the signal below a predetermined signal clipping level. An incoming signal is amplified by a predetermined amount of gain to provide a received signal. The level of the received signal is compared to a first reference level and a second reference level by a signal level detector. The comparative information regarding the level of the received signal is provided to a signal adjustment controller which provides control signals to the amplifier to maintain the received signal level between the first and second reference levels.

摘要翻译： 提供了一种用于检测和放大调制解调器的模拟前端中的接收信号的电平以便将信号的电平维持在预定信号限幅电平以下的装置和方法。 输入信号被放大预定量的增益以提供接收信号。 通过信号电平检测器将接收信号的电平与第一参考电平和第二参考电平进行比较。 关于接收信号的电平的比较信息被提供给信号调节控制器，该信号调节控制器向放大器提供控制信号以保持第一和第二参考电平之间的接收信号电平。

公开(公告)号：US5523719A

公开(公告)日：1996-06-04

申请号：US196328

申请日：1994-02-15

申请人： Lorenzo L. Longo ,  Raouf Halim ,  Bor-Rong Horng

发明人： Lorenzo L. Longo ,  Raouf Halim ,  Bor-Rong Horng

IPC分类号： H03H19/00 ,  H03M3/02 ,  H03K5/22 ,  H03K19/00

CPC分类号： H03M3/404 ,  H03H19/004 ,  H03M3/458

摘要： A digitally driven, analog bandpass filter has an analog summer and two analog delay elements connected in a loop. An input signal to the filter is applied to a plus input terminal of the summer, and the output of the second delay elements is applied to a minus input terminal of the summer. The output of filter may be taken either from the output of the summer, or from the output of the second delay element, or from any point in between. Each delay element is driven by a two phase non-overlapping clock, and each element passes a charge from a first capacitor through an op amp to either a second capacitor (first phase) or a third capacitor (second phase). Amplification may be provided by adjusting the ratio of the second (or third) capacitor to the first capacitor. If a differential op amp is used, both sides of the op amp are clocked together, and each side has its own trio of capacitors identical to the trio on the other side. The passband is centered precisely on one-quarter of the clock frequency, and does not vary with manufacturing variances in the components of the filter.

摘要翻译： 数字驱动的模拟带通滤波器具有模拟加法器和连接在一个回路中的两个模拟延迟元件。 将滤波器的输入信号施加到加法器的正输入端，并且将第二延迟元件的输出施加到夏季的负输入端。 滤波器的输出可以从夏季的输出，或从第二延迟元件的输出，或者从中间的任何点获取。 每个延迟元件由两相非重叠时钟驱动，并且每个元件将来自第一电容器的电荷通过运算放大器传递到第二电容器（第一相位）或第三电容器（第二相位）。 可以通过调节第二（或第三）电容器与第一电容器的比率来提供放大。 如果使用差分运算放大器，则运算放大器的两侧都在一起计时，并且每一侧都有三个与三端三端相同的三相电容。 通带中心精确地位于时钟频率的四分之一，并且不随过滤器组件的制造差异而变化。

公开(公告)号：US5574452A

公开(公告)日：1996-11-12

申请号：US196354

申请日：1994-02-15

申请人： Lorenzo L. Longo ,  Raouf Halim ,  Bor-Rong Horng

发明人： Lorenzo L. Longo ,  Raouf Halim ,  Bor-Rong Horng

IPC分类号： H03M3/02

CPC分类号： H03M3/324 ,  H03M3/406 ,  H03M3/43 ,  H03M3/454

摘要： A single bit bandpass analog-to-digital converter has an analog summer, an analog bandpass filter, a single bit quantizer, and a single bit digital-to-analog converter connected in a loop. An input signal to the single bit filter is applied to a plus input terminal of the summer, and the output of the digital-to-analog converter is applied to a minus input terminal of the summer. The output signal from the single bit filter is taken from the output of the quantizer. The bandpass filter is preferably driven by a digital clock running at the same frequency as the quantizer and the digital-to-analog converter. This architecture reduces quantization noise within the passband at the possible expense of increasing it outside the passband. The passband is centered precisely on one-quarter of the clock frequency.

摘要翻译： 单位带通模拟数字转换器具有模拟加法器，模拟带通滤波器，单比特量化器和以循环连接的单比特数模转换器。 将单位滤波器的输入信号施加到加法器的正输入端，并且数模转换器的输出被施加到夏季的负输入端。 来自单位滤波器的输出信号取自量化器的输出。 带通滤波器优选地以与量化器和数模转换器相同的频率运行的数字时钟驱动。 这种架构降低了通带内的量化噪声，可能会增加通带外的噪声。 通带正好位于时钟频率的四分之一。

公开(公告)号：US4852151A

公开(公告)日：1989-07-25

申请号：US159694

申请日：1988-02-24

申请人： Ashok Dittakavi ,  Robert L. Richards ,  Raouf Halim

发明人： Ashok Dittakavi ,  Robert L. Richards ,  Raouf Halim

IPC分类号： H04M3/428 ,  H04M11/06

CPC分类号： H04M11/06 ,  H04M3/428

摘要： A modem is adapted to accommodate a call waiting feature so that a user can select to continue an ongoing call or accept an incoming call. The modem detects a call waiting signal and generates a call waiting message. Where a call waiting signal is preceded by a loss of carrier, the modem detects the loss of carrier and then detects the presence of energy in a call progress band indicating that a new call is waiting. The modem can be selectably programmed to process the call waiting signal or to provide a call waiting message to a communications software package that can process the call waiting signal. The modem, in conjunction with the communications of software package, responds to the call waiting signal by asking whether the user wants to answer the incoming call or continue with the ongoing communication. The modem generates a programmable default response if the user does not respond within a prescribed time.

摘要翻译： 调制解调器适于容纳呼叫等待特征，使得用户可以选择继续正在进行的呼叫或接受来话呼叫。 调制解调器检测呼叫等待信号并产生呼叫等待消息。 如果呼叫等待信号在载波丢失之前，则调制解调器检测到载波的丢失，然后检测到呼叫进程带中存在表示新呼叫正在等待的能量的存在。 调制解调器可以被可选择地编程以处理呼叫等待信号或者向可以处理呼叫等待信号的通信软件包提供呼叫等待消息。 调制解调器结合软件包的通信，通过询问用户是否要接听来电或继续正在进行的通信来响应呼叫等待信号。 如果用户在规定的时间内没有响应，则调制解调器产生可编程的默认响应。