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    COLLABORATIVE CLOCK AND DATA RECOVERY
    2.
    发明申请
    COLLABORATIVE CLOCK AND DATA RECOVERY 有权
    合作时钟和数据恢复

    公开(公告)号：US20170033918A1

    公开(公告)日：2017-02-02

    申请号：US15212514

    申请日：2016-07-18

    申请人： Rambus Inc.

    发明人： Masum Hossain ,  Nhat Nguyen ,  Yikui Jen Dong ,  Arash Zargaran-Yazd

    IPC分类号： H04L7/00 ,  H03K7/02 ,  H03L7/08 ,  H04L25/49

    CPC分类号： H04L7/0087 ,  H03K7/02 ,  H03L7/00 ,  H04L7/0025 ,  H04L7/0337 ,  H04L25/4917

    摘要： A receiver serial data streams generates a local timing reference clock from an approximate frequency reference clock by phase-aligning the local clock to transitions in the data stream. This process is commonly known as clock and data recovery (CDR). Certain transitions of the data signals are selected for use in phase-aligning the local clock, and certain transitions are ignored. Phase-error signals from multiple receivers receiving the multiple serial data streams are combined and used to make common phase adjustments to the frequency reference clock. These common adjustments track jitter that is common to the received data streams. Local adjustments that better align each respective local clock to the transitions of its respective serial data stream are made using a local phase-error signal. These local adjustments track jitter that is more unique to each of the respective serial data streams.

    摘要翻译： 接收器串行数据流通过将本地时钟相位对准数据流中的转换，从近似频率参考时钟产生本地定时参考时钟。 这个过程通常被称为时钟和数据恢复（CDR）。 选择数据信号的某些转换用于对准本地时钟，并忽略某些转换。 来自接收多个串行数据流的多个接收机的相位误差信号被组合并用于对频率参考时钟进行共同的相位调整。 这些通用调整跟踪所接收数据流通用的抖动。 使用本地相位误差信号来进行使各个本地时钟更好地对准其相应串行数据流的转换的本地调整。 这些本地调整跟踪每个相应串行数据流更独特的抖动。

    TRANSMITTER WITH SELF-TRIGGERED TRANSITION EQUALIZER
    3.
    发明申请
    TRANSMITTER WITH SELF-TRIGGERED TRANSITION EQUALIZER 审中-公开

    公开(公告)号：US20180278440A1

    公开(公告)日：2018-09-27

    申请号：US15761938

    申请日：2016-08-03

    申请人： RAMBUS INC.

    发明人： Yikui Jen Dong

    IPC分类号： H04L25/03

    CPC分类号： H04L25/03343 ,  G11C7/1057 ,  G11C7/1069 ,  G11C2207/107 ,  H04L25/0272 ,  H04L25/028 ,  H04L25/03 ,  H04L25/03012 ,  H04L25/03878 ,  H04L25/03885

    摘要： A transmitting device includes an output node, at least one driver circuit and transition equalization circuitry. The driver circuit drives an output data signal including a data transition onto the output node. The output of the transition equalization circuitry is coupled to the output node. The transition equalization circuitry begins to drive the output node at the data transition and ends driving of the output node a pre-determined delay after beginning to drive the output node. The transition equalization circuitry drives the output node by injecting current onto the output node if the data transition is a positive transition, and sinking current from the output node if the data transition is a negative transition.

    Receiver with offset calibration
    4.
    发明授权
    Receiver with offset calibration 有权

    公开(公告)号：US09674009B2

    公开(公告)日：2017-06-06

    申请号：US14942929

    申请日：2015-11-16

    申请人： Rambus Inc.

    发明人： Yikui Jen Dong

    IPC分类号： H03H7/30 ,  H04L25/03 ,  H04B1/16 ,  H04L25/02

    CPC分类号： H04L25/03057 ,  H04B1/16 ,  H04B10/69 ,  H04B10/695 ,  H04L25/0272 ,  H04L25/0292

    摘要： An on-chip AC coupled receiver with offset calibration. The receiver includes AC coupling circuitry to couple a differential input signal into a coupled differential signal having a first signal and a second signal. The receiver includes a first comparator to generate a first error signal indicative of whether a first reference signal is greater or smaller than a signal derived from the coupled differential signal. The receiver includes a second comparator to generate a second error signal indicative of whether a second reference signal is greater or smaller than the signal derived from the coupled differential signal. The receiver further includes feedback circuitry to adjust a voltage offset between the first signal and the second signal of the coupled differential signal based on the first error signal and the second error signal.

    On-Chip AC Coupled Receiver with Real-Time Linear Baseline-Wander Compensation
    5.
    发明申请
    On-Chip AC Coupled Receiver with Real-Time Linear Baseline-Wander Compensation 有权
    具有实时线性基线漂移补偿的片上AC耦合接收器

    公开(公告)号：US20160013955A1

    公开(公告)日：2016-01-14

    申请号：US14789794

    申请日：2015-07-01

    申请人： Rambus Inc.

    发明人： Yikui Jen Dong

    IPC分类号： H04L25/03 ,  H04L25/06

    CPC分类号： H04L25/03019 ,  H03K5/007 ,  H04L25/0292 ,  H04L25/0296 ,  H04L25/06 ,  H04L47/50

    摘要： An on-chip AC coupled receiver with baseline wander compensation. The receiver may be used for either single ended or differential signals. The receiver includes an input terminal to receive an input signal. AC coupling circuitry is between the input terminal and a node and couples the input signal into a coupled signal at the node. A control loop senses low frequency signal content at the node and uses a linear buffer in adjusting the coupled signal at the node based on the low frequency signal content. The operation of the control loop compensates for potential baseline wander in the coupled signal. An input stage to recovers data from the coupled signal at the node.

    摘要翻译： 具有基线漂移补偿的片上AC耦合接收器。 接收机可以用于单端或差分信号。 接收机包括用于接收输入信号的输入端。 AC耦合电路位于输入端和节点之间，并将输入信号耦合到节点处的耦合信号。 控制回路感测节点处的低频信号内容，并且基于低频信号内容使用线性缓冲器来调整节点处的耦合信号。 控制环路的操作补偿了耦合信号中潜在的基线漂移。 用于从节点处的耦合信号恢复数据的输入级。

    Transmitter with self-triggered transition equalizer
    7.
    发明授权
    Transmitter with self-triggered transition equalizer 有权

    公开(公告)号：US11057247B2

    公开(公告)日：2021-07-06

    申请号：US16700549

    申请日：2019-12-02

    申请人： Rambus Inc.

    发明人： Yikui Jen Dong

    IPC分类号： H04L25/03 ,  G11C7/10 ,  H04L25/02

    摘要： A transmitting device includes an output node, at least one driver circuit and transition equalization circuitry. The driver circuit drives an output data signal including a data transition onto the output node. The output of the transition equalization circuitry is coupled to the output node. The transition equalization circuitry begins to drive the output node at the data transition and ends driving of the output node a pre-determined delay after beginning to drive the output node. The transition equalization circuitry drives the output node by injecting current onto the output node if the data transition is a positive transition, and sinking current from the output node if the data transition is a negative transition.

    COLLABORATIVE CLOCK AND DATA RECOVERY
    8.
    发明申请
    COLLABORATIVE CLOCK AND DATA RECOVERY 审中-公开

    公开(公告)号：US20180152284A1

    公开(公告)日：2018-05-31

    申请号：US15799016

    申请日：2017-10-31

    申请人： Rambus Inc.

    发明人： Masum Hossain ,  Nhat Nguyen ,  Yikui Jen Dong ,  Arash Zargaran-Yazd

    IPC分类号： H04L7/00 ,  H04L25/49 ,  H03K7/02 ,  H03L7/00

    CPC分类号： H04L7/0087 ,  H03K7/02 ,  H03L7/00 ,  H04L7/0025 ,  H04L7/0337 ,  H04L25/4917

    摘要： A receiver serial data streams generates a local timing reference clock from an approximate frequency reference clock by phase-aligning the local clock to transitions in the data stream. This process is commonly known as clock and data recovery (CDR). Certain transitions of the data signals are selected for use in phase-aligning the local clock, and certain transitions are ignored. Phase-error signals from multiple receivers receiving the multiple serial data streams are combined and used to make common phase adjustments to the frequency reference clock. These common adjustments track jitter that is common to the received data streams. Local adjustments that better align each respective local clock to the transitions of its respective serial data stream are made using a local phase-error signal. These local adjustments track jitter that is more unique to each of the respective serial data streams.

    On-Chip AC Coupled Receiver with Real-Time Linear Baseline-Wander Compensation
    9.
    发明申请
    On-Chip AC Coupled Receiver with Real-Time Linear Baseline-Wander Compensation 有权

    公开(公告)号：US20170099163A1

    公开(公告)日：2017-04-06

    申请号：US15290275

    申请日：2016-10-11

    申请人： Rambus Inc.

    发明人： Yikui Jen Dong

    IPC分类号： H04L25/03 ,  H04L12/863 ,  H04L25/02

    CPC分类号： H04L25/03019 ,  H03K5/007 ,  H04L25/0292 ,  H04L25/0296 ,  H04L25/06 ,  H04L47/50

    摘要： An on-chip AC coupled receiver with baseline wander compensation. The receiver may be used for either single ended or differential signals. The receiver includes an input terminal to receive an input signal. AC coupling circuitry is between the input terminal and a node and couples the input signal into a coupled signal at the node. A control loop senses low frequency signal content at the node and uses a linear buffer in adjusting the coupled signal at the node based on the low frequency signal content. The operation of the control loop compensates for potential baseline wander in the coupled signal. An input stage to recovers data from the coupled signal at the node.

    Receiver with Offset Calibration
    10.
    发明申请
    Receiver with Offset Calibration 有权
    带偏置校准的接收器

    公开(公告)号：US20160182260A1

    公开(公告)日：2016-06-23

    申请号：US14942929

    申请日：2015-11-16

    申请人： Rambus Inc.

    发明人： Yikui Jen Dong

    IPC分类号： H04L25/03 ,  H04B1/16

    CPC分类号： H04L25/03057 ,  H04B1/16 ,  H04B10/69 ,  H04B10/695 ,  H04L25/0272 ,  H04L25/0292

    摘要： An on-chip AC coupled receiver with offset calibration. The receiver includes AC coupling circuitry to couple a differential input signal into a coupled differential signal having a first signal and a second signal. The receiver includes a first comparator to generate a first error signal indicative of whether a first reference signal is greater or smaller than a signal derived from the coupled differential signal. The receiver includes a second comparator to generate a second error signal indicative of whether a second reference signal is greater or smaller than the signal derived from the coupled differential signal. The receiver further includes feedback circuitry to adjust a voltage offset between the first signal and the second signal of the coupled differential signal based on the first error signal and the second error signal.

    摘要翻译： 具有偏移校准的片上AC耦合接收器。 接收器包括AC耦合电路，用于将差分输入信号耦合到具有第一信号和第二信号的耦合差分信号中。 接收机包括：第一比较器，用于产生第一误差信号，该第一误差信号指示第一参考信号是大于还是小于从所耦合的差分信号导出的信号。 接收机包括第二比较器，用于产生指示第二参考信号是大于还是小于从耦合差分信号导出的信号的第二误差信号。 接收器还包括反馈电路，用于基于第一误差信号和第二误差信号来调整第一信号和耦合的差分信号的第二信号之间的电压偏移。