公开(公告)号：US20180374794A1

公开(公告)日：2018-12-27

申请号：US15985233

申请日：2018-05-21

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Keiichiro TANAKA

IPC分类号： H01L23/522 ,  H01L49/02 ,  H03F1/56

CPC分类号： H01L23/5227 ,  H01L23/5225 ,  H01L28/10 ,  H03F1/565 ,  H03F3/45475

摘要： In order to easily sort failures due to short circuit between wires in an inductor, a semiconductor device includes a plurality of inductors (first inductor, second inductor) formed in a plurality of wiring layers. In each of the wiring layers, the metal layer of the first inductor and the metal layer of the second inductor respectively extend around the peripheral region from the inner periphery to the outer periphery in the same direction. The metal layer of the first inductor and the metal layer of the second inductor are arranged so as to be adjacent to each other.

公开(公告)号：US20170345755A1

公开(公告)日：2017-11-30

申请号：US15479978

申请日：2017-04-05

申请人： Renesas Electronics Corporation

发明人： Shinichi UCHIDA ,  Keiichiro TANAKA ,  Takafumi KURAMOTO

IPC分类号： H01L23/522 ,  H01L23/552 ,  H01L23/532 ,  H01L23/528 ,  G01R19/00 ,  G01R15/18 ,  H01L21/3205 ,  H01F41/04 ,  H01F27/34 ,  H01F27/28 ,  H01L29/06 ,  H01L21/762

CPC分类号： H01L23/5227 ,  G01R15/18 ,  G01R15/181 ,  G01R19/0092 ,  H01F17/0013 ,  H01F27/2804 ,  H01F27/34 ,  H01F41/041 ,  H01F2017/0073 ,  H01F2017/008 ,  H01F2017/0086 ,  H01F2027/2809 ,  H01L21/32053 ,  H01L21/32055 ,  H01L21/76224 ,  H01L23/5225 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53271 ,  H01L23/552 ,  H01L29/0649

摘要： According to one embodiment, a semiconductor device 1 includes an Si substrate 11, an inductor 12 formed in wiring layers disposed above the Si substrate 11, and a shield 13 formed so as to surround the inductor 12, in which the shield 13 includes metals 105 to 109 formed in, among the wiring layers, a layer in which the inductor 12 is formed and a layer above that layer, and a silicide 104 formed between the Si substrate 11 and the wiring layers above the Si substrate 11.