公开(公告)号：US20140125289A1

公开(公告)日：2014-05-08

申请号：US14070644

申请日：2013-11-04

Applicant: Renesas Electronics Corporation

Inventor： Fumio TONOMURA ,  Hideo ISHII ,  Tsuyoshi OTA

IPC: H02J7/00

CPC classification number: H02J7/0029 ,  G01R19/00 ,  G01R19/16519 ,  G01R19/16542 ,  G01R31/3606 ,  H01L27/0207 ,  H01L27/088 ,  H01L29/7813 ,  H01L29/7815 ,  H01M10/48 ,  H01M2010/4278 ,  H02J2007/0037 ,  H02J2007/0039 ,  H02J2007/004

Abstract: A cell protection system includes a charge control MOSFET 21, a charge current detection MOSFET 23, a discharge control MOSFET 20, a discharge current detection MOSFET 22, a charge current detection resistance 19, a discharge current detection resistance 16 and a control circuit. The MOSFET 23 has a drain and a gate common with the MOSFET 21. The MOSFET 20 has a drain common with the MOSFET 21. The MOSFET 22 has a drain and a gate common with the MOSFET 20. The resistances 19 and 16 are provided in correspondence to the MOSFETs 23 and 22, respectively. The control circuit generates a gate control signal for the MOSFETs 21 and 23 by using the resistance 19 and generates a gate control signal for the MOSFETs 20 and 22 by using the resistance 16.

Abstract translation: 电池保护系统包括充电控制MOSFET 21，充电电流检测MOSFET 23，放电控制MOSFET 20，放电电流检测MOSFET 22，充电电流检测电阻19，放电电流检测电阻16和控制电路。 MOSFET 23具有与MOSFET 21共用的漏极和栅极。MOSFET 20具有与MOSFET 21共用的漏极。MOSFET 22具有与MOSFET 20共用的漏极和栅极。电阻19和16设置在 对应于MOSFET 23和22。 控制电路通过使用电阻19产生用于MOSFET 21和23的栅极控制信号，并且通过使用电阻16产生用于MOSFET 20和22的栅极控制信号。

公开(公告)号：US20160149424A1

公开(公告)日：2016-05-26

申请号：US15010050

申请日：2016-01-29

Applicant: Renesas Electronics Corporation

Inventor： Fumio TONOMURA ,  Hideo ISHII ,  Tsuyoshi OTA

IPC: H02J7/00 ,  G01R31/36

CPC classification number: H02J7/0029 ,  G01R19/00 ,  G01R19/16519 ,  G01R19/16542 ,  G01R31/3606 ,  H01L27/0207 ,  H01L27/088 ,  H01L29/7813 ,  H01L29/7815 ,  H01M10/48 ,  H01M2010/4278 ,  H02J2007/0037 ,  H02J2007/0039 ,  H02J2007/004

Abstract: A cell protection system includes a charge control MOSFET 21, a charge current detection MOSFET 23, a discharge control MOSFET 20, a discharge current detection MOSFET 22, a charge current detection resistance 19, a discharge current detection resistance 16 and a control circuit. The MOSFET 23 has a drain and a gate common with the MOSFET 21. The MOSFET 20 has a drain common with the MOSFET 21. The MOSFET 22 has a drain and a gate common with the MOSFET 20. The resistances 19 and 16 are provided in correspondence to the MOSFETs 23 and 22, respectively. The control circuit generates a gate control signal for the MOSFETs 21 and 23 by using the resistance 19 and generates a gate control signal for the MOSFETs 20 and 22 by using the resistance 16.

Abstract translation: 电池保护系统包括充电控制MOSFET 21，充电电流检测MOSFET 23，放电控制MOSFET 20，放电电流检测MOSFET 22，充电电流检测电阻19，放电电流检测电阻16和控制电路。 MOSFET 23具有与MOSFET 21共用的漏极和栅极。MOSFET 20具有与MOSFET 21共用的漏极。MOSFET 22具有与MOSFET 20共用的漏极和栅极。电阻19和16设置在 对应于MOSFET 23和22。 控制电路通过使用电阻19产生用于MOSFET 21和23的栅极控制信号，并且通过使用电阻16产生用于MOSFET 20和22的栅极控制信号。

公开(公告)号：US20190199103A1

公开(公告)日：2019-06-27

申请号：US16193641

申请日：2018-11-16

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kohei KAWANO ,  Tsuyoshi OTA

IPC: H02J7/00

CPC classification number: H02J7/008

Abstract: A semiconductor device capable of turning a discharge control transistor off faster while maintaining safety is provided. A control unit, in discharge stopping processing, turns a switching element on and executes a first discharge-stopping mode in which the gate voltage of the discharge control transistor is withdrawn via a load and, at a predetermined discharge-stopping mode switching timing, switches to a second discharge-stopping mode in which the gate voltage of the discharge control transistor is withdrawn directly to a low-voltage power source.

公开(公告)号：US20140070319A1

公开(公告)日：2014-03-13

申请号：US13952869

申请日：2013-07-29

Applicant: Renesas Electronics Corporation

Inventor： Fumio TONOMURA ,  Hideo ISHII ,  Tsuyoshi OTA

IPC: H01L27/06

CPC classification number: H01L27/0255 ,  H01L23/34 ,  H01L23/4824 ,  H01L25/16 ,  H01L27/0211 ,  H01L27/0251 ,  H01L27/0296 ,  H01L27/0629 ,  H01L27/0676 ,  H01L29/866 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A first MOSFET is formed in a first region of a chip, and a second MOSFET is formed in a second region thereof. A first source terminal and a first gate terminal are formed in the first region. In the second region, a second source terminal and a second gate terminal are arranged so as to be aligned substantially parallel to a direction in which the first source terminal and the first gate terminal are aligned. A temperature detection diode is arranged between the first source terminal and the second source terminal. A first terminal and a second terminal of the temperature detection diode are aligned in a first direction substantially parallel to a direction in which the first source terminal and the first gate terminal are aligned or in a second direction substantially perpendicular thereto.

Abstract translation: 第一MOSFET形成在芯片的第一区域中，并且第二MOSFET形成在其第二区域中。 第一源极端子和第一栅极端子形成在第一区域中。 在第二区域中，第二源极端子和第二栅极端子布置成基本上平行于第一源极端子和第一栅极端子对准的方向对准。 温度检测二极管设置在第一源极端子和第二源极端子之间。 温度检测二极管的第一端子和第二端子在基本上平行于第一源极端子和第一栅极端子对准的方向的第一方向上或者与其基本垂直的第二方向上对齐。

公开(公告)号：US20200295585A1

公开(公告)日：2020-09-17

申请号：US16815723

申请日：2020-03-11

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Tsuyoshi OTA ,  Youhei KENGOYAMA

IPC: H02J7/00 ,  H01M10/44 ,  H01M10/42 ,  H01M10/48

Abstract: To suppress the occurrence of system shutdown after long term storage of batteries. A semiconductor device comprises a control unit that controls charging and discharging of a battery cell, and a ROM that stores a power supply capability value which specifies a power supply capacity of the battery cell that can be stably supplied to an application system in which the battery pack is provided. After the battery pack returns from the sleep mode and before the transmission request of the power supply capability value is received from the system, the control [unit performs a power supply capability value updating process of updating the power supply capability value in the ROM to a value smaller than the power supply capability value before the sleep mode.

公开(公告)号：US20150214213A1

公开(公告)日：2015-07-30

申请号：US14681452

申请日：2015-04-08

Applicant: Renesas Electronics Corporation

Inventor： Fumio TONOMURA ,  Hideo ISHII ,  Tsuyoshi OTA

IPC: H01L27/02 ,  H01L29/866 ,  H01L27/06

CPC classification number: H01L27/0255 ,  H01L23/34 ,  H01L23/4824 ,  H01L25/16 ,  H01L27/0211 ,  H01L27/0251 ,  H01L27/0296 ,  H01L27/0629 ,  H01L27/0676 ,  H01L29/866 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A first MOSFET is formed in a first region of a chip, and a second MOSFET is formed in a second region thereof. A first source terminal and a first gate terminal are formed in the first region. In the second region, a second source terminal and a second gate terminal are arranged so as to be aligned substantially parallel to a direction in which the first source terminal and the first gate terminal are aligned. A temperature detection diode is arranged between the first source terminal and the second source terminal. A first terminal and a second terminal of the temperature detection diode are aligned in a first direction substantially parallel to a direction in which the first source terminal and the first gate terminal are aligned or in a second direction substantially perpendicular thereto.

Abstract translation: 第一MOSFET形成在芯片的第一区域中，并且第二MOSFET形成在其第二区域中。 第一源极端子和第一栅极端子形成在第一区域中。 在第二区域中，第二源极端子和第二栅极端子布置成基本上平行于第一源极端子和第一栅极端子对准的方向对准。 温度检测二极管设置在第一源极端子和第二源极端子之间。 温度检测二极管的第一端子和第二端子在基本上平行于第一源极端子和第一栅极端子对准的方向的第一方向上或者与其基本垂直的第二方向上对齐。