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公开(公告)号：US5467922A
公开(公告)日：1995-11-21
申请号：US308387
申请日：1994-09-19
CPC分类号： A01K1/0047 , F24F11/0009 , F24F11/0012 , F24F11/0015
摘要： A poultry house controller (14) situated within a poultry house (12) regulates the relative humidity and temperature within the poultry house (12) via actuation of fans (22) and heaters (24) in response to temperature and humidity feedback signals from temperature sensors (16) and humidity sensors (18), respectively. The controller (14) can communicate with a host computer (16) and other controllers (14) situated at other houses (12). The controller (14) comprises an integrity check means (234) for checking temperature and humidity values detected by these sensors (16, 18). The integrity check means (234) ensures the accuracy of values by eliminating a value from consideration if it falls outside predefined range of the average of the other values received from other sensors. Additionally, the controller (14) utilizes watchdog timing signals (100) for ensuring continuous operation. The watchdog timing signals (100) are generated by a control program (108) and are sent to an alarm system (92). An alarm horn (94) is sounded upon failure to receive a watchdog timing signal (100) within a predefined time period. Finally, the controller (14) optimally controls the fans (22) for ventilation and for modifying temperature by decreasing the predefined time period pertaining to the fan dedicated to minimum ventilation requirements by a time amount corresponding to actuation of another fan within the predefined time interval.
摘要翻译： 位于家禽屋（12）内的禽舍控制器（14）响应于来自温度的温度和湿度反馈信号，通过致动风扇（22）和加热器（24）来调节家禽舍（12）内的相对湿度和温度 感测器（16）和湿度传感器（18）。 控制器（14）可以与位于其他房屋（12）的主计算机（16）和其他控制器（14）通信。 控制器（14）包括用于检查由这些传感器（16,18）检测到的温度和湿度值的完整性检查装置（234）。 如果完整性检查装置（234）超出从其它传感器接收的其它值的平均值的预定范围之外，则通过从考虑中消除值来确保值的精度。 另外，控制器（14）利用看门狗定时信号（100）来确保连续操作。 看门狗定时信号（100）由控制程序（108）生成并被发送到报警系统（92）。 在预定时间段内未收到看门狗定时信号（100）时，发出报警喇叭（94）。 最后，控制器（14）通过将与专用于最小通风要求的风扇有关的预定时间减少预定时间间隔内与另一风扇的致动相对应的时间量来最佳地控制风扇（22）进行通风和修改温度 。
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公开(公告)号：US5407129A
公开(公告)日：1995-04-18
申请号：US113851
申请日：1993-08-30
CPC分类号： A01K1/0047 , F24F11/0009 , F24F11/0012 , F24F11/0015
摘要： A poultry house controller (14) situated within a poultry house (12) regulates the relative humidity and temperature within the poultry house (12) via actuation of fans (22) and heaters (24) in response to temperature and humidity feedback signals from temperature sensors (16) and humidity sensors (18), respectively. The controller (14) can communicate with a host computer (16) and other controllers (14) situated at other houses (12). The controller (14) comprises an integrity check means (234) for checking temperature and humidity values detected by these sensors (16, 18). The integrity check means (234) ensures the accuracy of values by eliminating a value from consideration if it falls outside predefined range of the average of the other values received from other sensors. Additionally, the controller (14) utilizes watchdog timing signals (100) for ensuring continuous operation. The watchdog timing signals (100) are generated by a control program (108) and are sent to an alarm system (92). An alarm horn (94) is sounded upon failure to receive a watchdog timing signal (100) within a predefined time period. Finally, the controller (14) optimally controls the fans (22) for ventilation and for modifying temperature by decreasing the predefined time period pertaining to the fan dedicated to minimum ventilation requirements by a time amount corresponding to actuation of another fan within the predefined time interval.
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公开(公告)号：US5482210A
公开(公告)日：1996-01-09
申请号：US308850
申请日：1994-09-19
CPC分类号： A01K1/0047 , F24F11/0009 , F24F11/0012 , F24F11/0015
摘要： A poultry house controller (14) situated within a poultry house (12) regulates the relative humidity and temperature within the poultry house (12) via actuation of fans (22) and heaters (24) in response to temperature and humidity feedback signals from temperature sensors (16) and humidity sensors (18), respectively. The controller (14) can communicate with a host computer (16) and other controllers (14) situated at other houses (12). The controller (14) comprises an integrity check means (234) for checking temperature and humidity values detected by these sensors (16, 18). The integrity check means (234) ensures the accuracy of values by eliminating a value from consideration if it falls outside predefined range of the average of the other values received from other sensors. Additionally, the controller (14) utilizes watchdog timing signals (100) for ensuring continuous operation. The watchdog timing signals (100) are generated by a control program (108) and are sent to an alarm system (92). An alarm horn (94) is sounded upon failure to receive a watchdog timing signal (100) within a predefined time period. Finally, the controller (14) optimally controls the fans (22) for ventilation and for modifying temperature by decreasing the predefined time period pertaining to the fan dedicated to minimum ventilation requirements by a time amount corresponding to actuation of another fan within the predefined time interval.
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公开(公告)号：US4489380A
公开(公告)日：1984-12-18
申请号：US364381
申请日：1982-04-01
申请人： Richard A. Carey , Jerry Falk
发明人： Richard A. Carey , Jerry Falk
CPC分类号： G06F12/1433
摘要： An interactive terminal includes a central processor unit (CPU) having a microprocessor and a random access memory (RAM). Signals from the microprocessor place the RAM in a write protect mode. If the RAM receives a write instruction from the microprocessor when the RAM is in the write protect mode, then an illegal condition is indicated and a nonmaskable interrupt is generated to allow the terminal to recover. When the RAM is in the write protect mode, signals from the microprocessor restore the RAM to its normal read/write mode.
摘要翻译： 交互式终端包括具有微处理器和随机存取存储器（RAM）的中央处理器单元（CPU）。 来自微处理器的信号将RAM置于写保护模式。 如果在RAM处于写保护模式时RAM接收到来自微处理器的写指令，则指示非法状态，并产生不可屏蔽的中断以允许终端恢复。 当RAM处于写保护模式时，来自微处理器的信号将RAM恢复到正常的读/写模式。
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公开(公告)号：US6056790A
公开(公告)日：2000-05-02
申请号：US85743
申请日：1998-05-27
申请人： James Leonard Clark , Wayne Coleman Tincher , Wiley Don Holcombe , Richard A. Carey , Elizabeth Wise White
发明人： James Leonard Clark , Wayne Coleman Tincher , Wiley Don Holcombe , Richard A. Carey , Elizabeth Wise White
CPC分类号： D06B23/20 , D06P1/0008 , D06P1/0032 , Y10S8/93 , Y10S8/931
摘要： The present invention is a fully automated modified batch dyeing process that provides a process that reduces water consumption, reduces environmental pollution, and reduces the energy and chemical consumption of the conventional batch dyeing process through efficient reuse of spent dyebath. The invention provides a holding tank which stores the spent dyebath, and an analysis system which allows for the analysis of the dyebath in the holding tank so that the dyebath may be reconstituted and used in the batch dyeing process.
摘要翻译： 本发明是一种完全自动化的改性批量染色方法，其提供了通过有效再利用废染水来降低耗水量，减少环境污染并降低常规批量染色方法的能量和化学消耗的方法。 本发明提供了一种储存废弃染浴的储存罐，以及一种分析系统，该分析系统允许分析储罐中的染浴，使得染浴可以重新配制并用于分批染色过程。
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公开(公告)号：US4475195A
公开(公告)日：1984-10-02
申请号：US364382
申请日：1982-04-01
申请人： Richard A. Carey
发明人： Richard A. Carey
IPC分类号： G06F11/267 , G06F11/00
CPC分类号： G06F11/2236
摘要： An address bus of a central processor unit (CPU) is tested by generating repetitive "no operation" (NO OP) instructions. A microprocessor in the CPU receives the NO OP instruction code set manually into switches and generates sequential addresses on successive CPU cycles on the address bus. The microprocessor generates a read signal during each CPU cycle which is jumpered to portions of the logic to allow continuity of operation during test.
摘要翻译： 通过产生重复的“无操作”（NO OP）指令来测试中央处理器单元（CPU）的地址总线。 CPU中的微处理器将手动将NO OP指令代码集合到交换机中，并在地址总线上的连续CPU周期上生成顺序地址。 微处理器在每个CPU周期期间产生一个读取信号，该读取信号跳到逻辑部分，以允许在测试期间连续运行。
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公开(公告)号：US4543629A
公开(公告)日：1985-09-24
申请号：US690836
申请日：1985-01-14
申请人： Richard A. Carey , Jerry Falk
发明人： Richard A. Carey , Jerry Falk
IPC分类号： G06F13/362 , G06F1/04
CPC分类号： G06F13/362
摘要： An interactive terminal computer system is disclosed having a system bus for communicating between elements of the computer system which has apparatus for permitting the execution of a maximum number of concurrent bus cycles without interference with each other.
摘要翻译： 公开了一种交互式终端计算机系统，其具有用于在计算机系统的元件之间通信的系统总线，该系统总线具有用于允许执行最大数量的并发总线周期而不彼此干扰的装置。
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公开(公告)号：US06753956B2
公开(公告)日：2004-06-22
申请号：US09847669
申请日：2001-05-02
申请人： James Leonard Clark , Wayne Coleman Tincher , Wiley Don Holcombe , Richard A. Carey , Elizabeth Wise White
发明人： James Leonard Clark , Wayne Coleman Tincher , Wiley Don Holcombe , Richard A. Carey , Elizabeth Wise White
IPC分类号： G01J342
CPC分类号： D06B23/20 , D06P1/0008 , D06P1/0032
摘要： The present invention is a fully automated modified batch dyeing process that provides a process that reduces water consumption, reduces environmental pollution, and reduces the energy and chemical consumption of the conventional batch dyeing process through efficient reuse of spent dyebath. The invention provides a holding tank which stores the spent dyebath, and an analysis system which allows for the analysis of the dyebath in the holding tank so that the dyebath may be reconstituted and used in the batch dyeing process.
摘要翻译： 本发明是一种完全自动化的改性批量染色方法，其提供了通过有效再利用废染水来降低耗水量，减少环境污染并降低常规批量染色方法的能量和化学消耗的方法。 本发明提供了一种储存废弃染浴的储存罐，以及一种分析系统，该分析系统允许分析储罐中的染浴，使得染浴可以重新配制并用于分批染色过程。
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公开(公告)号：US5241565A
公开(公告)日：1993-08-31
申请号：US720638
申请日：1991-06-25
申请人： Dennis Kloc , Richard A. Carey
发明人： Dennis Kloc , Richard A. Carey
CPC分类号： H04W52/367 , H04L1/0003 , H04L1/0025 , H04L1/0026 , H04L1/206 , H04W52/18 , H04L1/18
摘要： A telecommunications system intermittently checks and, if necessary, adjusts the power level of the transmitted data as a function of the transmission characteristics of the transmission line so as to optimize transmission performance.
摘要翻译： 电信系统间歇地检查并根据传输线的传输特性来调整发射数据的功率电平，以便优化传输性能。
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公开(公告)号：US4535330A
公开(公告)日：1985-08-13
申请号：US372907
申请日：1982-04-29
申请人： Richard A. Carey , Jerry Falk
发明人： Richard A. Carey , Jerry Falk
IPC分类号： G06F13/30 , G06F13/364 , G06F9/00 , H04Q9/00
CPC分类号： G06F13/364 , G06F13/30
摘要： An interactive computer terminal system having a bus for communication between elements of the system is disclosed having apparatus for assigning control of the computer bus on a predetermined order of priority. The CPU receives requests from computer system elements and assigns time slots for use of the system bus by arbitrating among various resources competing for access to the bus.
摘要翻译： 公开了具有用于在系统的元件之间进行通信的总线的交互式计算机终端系统，具有以预定优先顺序分配计算机总线的控制的装置。 CPU从计算机系统元件接收请求，并通过在竞争访问总线的各种资源之间进行仲裁来分配使用系统总线的时隙。
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