利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

18 条记录 (耗时 0.027 秒)

    Large logical addressing method and means
    1.
    发明授权
    Large logical addressing method and means 失效
    大逻辑寻址方式和手段

    公开(公告)号：US5381537A

    公开(公告)日：1995-01-10

    申请号：US803320

    申请日：1991-12-06

    申请人： Richard I. Baum ,  Kenneth E. Plambeck ,  Casper A. Scalzi ,  Richard J. Schmalz ,  Bhaskar Sinha

    发明人： Richard I. Baum ,  Kenneth E. Plambeck ,  Casper A. Scalzi ,  Richard J. Schmalz ,  Bhaskar Sinha

    IPC分类号： G06F12/10 ,  G06F12/02 ,  G06F12/00

    CPC分类号： G06F12/0292

    摘要： A method and apparatus for translating a large logical address as a large virtual address (LVA) when a dynamic address translation (DAT) mode is on. Each LVA is separated into three concatenated parts: 1. a highest-order part (ADEN) for indexing into an access directory (AD) to locate an entry (ADE) for locating one access list (AL); 2. an intermediate part (ALEN) for indexing into a selected AL to access an entry (ALE) that enables location of an associated conventional address translation table which represents a conventional size virtual address space; and 3. a low-order DAT virtual address (VA) part having the same size as a conventional type of virtual address. The low-order DAT VA part is translated by the associated conventional address translation table. If a carry signal is generated during the creation of the low-order DAT VA part, then a change in the selection of an ALE results. An offset value of ALEs can be utilized to generate an effective ADEN and ALEN, which are utilized for the address translation of the LVA.

    摘要翻译： 当动态地址转换（DAT）模式打开时用于将大的逻辑地址翻译为大的虚拟地址（LVA）的方法和装置。 每个LVA被分成三个级联部分：1.用于索引到访问目录（AD）的最高阶部分（ADEN），以定位用于定位一个访问列表（AL）的条目（ADE）; 2.一种用于索引到所选择的AL以访问条目（ALE）的中间部分（ALEN），所述入口（ALE）使得能够定位表示常规大小的虚拟地址空间的相关联的常规地址转换表; 和3.具有与常规类型的虚拟地址相同大小的低阶DAT虚拟地址（VA）部分。 低阶DAT VA部分由相关联的常规地址转换表转换。 如果在创建低阶DAT VA部分期间产生进位信号，则会产生ALE选择的变化。 ALE的偏移值可用于生成有效的ADEN和ALEN，用于LVA的地址转换。

    Process using virtual addressing in a non-privileged instruction to control the copying of a page of data in or between multiple media
    4.
    发明授权
    Process using virtual addressing in a non-privileged instruction to control the copying of a page of data in or between multiple media 失效
    在非特权指令中使用虚拟寻址来控制数据在多媒体之间或之间复制的过程

    公开(公告)号：US5237668A

    公开(公告)日：1993-08-17

    申请号：US424797

    申请日：1989-10-20

    申请人： Geoffrey O. Blandy ,  David B. Emmes ,  Ronald F. Hill ,  David B. Lindquist ,  Kenneth E. Plambeck ,  Casper A. Scalzi ,  Richard J. Schmalz

    发明人： Geoffrey O. Blandy ,  David B. Emmes ,  Ronald F. Hill ,  David B. Lindquist ,  Kenneth E. Plambeck ,  Casper A. Scalzi ,  Richard J. Schmalz

    IPC分类号： G06F12/10 ,  G06F12/14

    CPC分类号： G06F12/10 ,  G06F12/145

    摘要： A single non-privileged instruction copies a page of data from a source virtual address in an electronic medium to a destination virtual address in the same or in a different electronic storage medium, and without the intervention of any supervisory program when each medium and the virtual addresses are previously determined. The instruction is not required to specify which medium it will use, does not require its user to know what backing medium it will access, does not require main storage (MS) to be its backing medium, and allows different types of physical addressing to be used by different media. The instruction can lock any page for use in a multi-processor (MP). No physical direction of data movement is provided within the non-privileged machine instruction, which only designates virtual direction of movement. The separation of virtual direction from physical direction is done by avoiding instruction control over selection of electronic media. The non-privileged instruction can nevertheless express a preference for obtaining a copy of the destination page in an electronic medium in which the content of the page can be processed by further instructions. Also, the instruction can cause invocation of a privileged control program to avoid the need for a following condition code test instruction. A privileged instruction is also provided to wait for the completion of the unprivileged instruction and to invalidate a non-MS medium page whether it is unlocked or locked, either correctly or incorrectly.

    Storage isolation with subspace-group facility
    5.
    发明授权
    Storage isolation with subspace-group facility 失效
    具有子空间组设备的存储隔离

    公开(公告)号：US5361356A

    公开(公告)日：1994-11-01

    申请号：US847521

    申请日：1992-03-06

    申请人： Carl E. Clark ,  Jeffrey A. Frey ,  Kenneth E. Plambeck ,  Casper A. Scalzi ,  Bhaskar Sinha

    发明人： Carl E. Clark ,  Jeffrey A. Frey ,  Kenneth E. Plambeck ,  Casper A. Scalzi ,  Bhaskar Sinha

    IPC分类号： G06F12/10 ,  G06F9/30 ,  G06F9/32 ,  G06F9/38 ,  G06F9/46 ,  G06F9/40

    CPC分类号： G06F9/30054 ,  G06F9/30003 ,  G06F9/3851 ,  G06F9/468

    摘要： A Branch in Subspace Group (BSG) instruction is executed in problem state (for example by an application program) for providing a fast instruction branch between address spaces within a restricted group of address spaces called a subspace group. The subspace group contains two types of address spaces: a base space and any number of subspaces. The subspace group is set up in a control table associated with each dispatchable unit (DU). This DU control table contains: an identifier of a base space, an identifier of an access list that contains identifiers of all subspaces in the subspace group, an indicator of whether CPU control was last given to a subspace or to the base space, and an identifier of a last entered subspace in the group. The BSG instruction has an operand defining a general register containing the target virtual address and an associated access register containing an access-list-entry token (ALET) defining the target address space. The ALET indexes to a target subspace identifier in the access list, and then the associated virtual address locates the target instruction in the identified target address space. BSG instruction execution controls restrict the BSG branching only to an instruction in the subspace group.

    摘要翻译： 子空间组（BSG）中的分支在问题状态（例如由应用程序）执行，用于在被称为子空间组的受限制的一组地址空间内的地址空间之间提供快速指令分支。 子空间组包含两种类型的地址空间：基本空间和任何数量的子空间。 子空间组设置在与每个可调度单元（DU）相关联的控制表中。 该DU控制表包含：基本空间的标识符，包含子空间组中所有子空间的标识符的访问列表的标识符，CPU控制是否被最后给予子空间或基本空间的指示符，以及 组中最后输入的子空间的标识符。 BSG指令具有定义包含目标虚拟地址的通用寄存器的操作数和包含定义目标地址空间的访问列表入口令牌（ALET）的关联访问寄存器。 ALET索引到访问列表中的目标子空间标识符，然后相关联的虚拟地址将目标指令定位在所识别的目标地址空间中。 BSG指令执行控制将BSG分支限制到子空间组中的指令。

    Method and apparatus for fully restoring a program context following an interrupt
    6.
    发明授权
    Method and apparatus for fully restoring a program context following an interrupt 失效

    公开(公告)号：US5987495A

    公开(公告)日：1999-11-16

    申请号：US966374

    申请日：1997-11-07

    申请人： Donald F. Ault ,  Kenneth E. Plambeck ,  Casper A. Scalzi

    发明人： Donald F. Ault ,  Kenneth E. Plambeck ,  Casper A. Scalzi

    IPC分类号： G06F9/46

    CPC分类号： G06F9/463

    摘要： A method and apparatus for fully restoring the context of a user program, including program status word (PSW) and CPU register contents, following an asynchronous interrupt. Upon the occurrence of an asynchronous interrupt event, control is transferred from the normally executing part of the user program to an interrupt handler of the operating system kernel. The kernel interrupt handler saves the contents of the CPU registers and PSW as they existed at the time of the interrupt in a save area associated with the user program before transferring control to a signal catcher routine of the user program. When it has finished handling the interrupt, the signal catcher routine restores the previous state of program execution as it existed before the interrupt by storing the address of the save area in a selected register (which may be a general register/access register pair), restoring the contents of the registers other than the selected register containing the address of the save area, and then restoring the contents of the PSW and selected register by using a new Resume Program (RP) instruction. The RP instruction contains an operand field specifying through the selected register the base address of the save area together with offset fields specifying the offsets of the saved contents of the PSW and selected register relative to the beginning of the save area. Upon decoding an RP instruction, the CPU executing the instruction adds the displacement to the base address contained in the specified register to form the beginning address of the save area, to which it adds the specified offsets to access the saved PSW and selected register contents. The current PSW and selected register contents are then restored with the saved contents to fully restore the previous program context and return control to the instruction being executed at the point of interrupt. To ensure system integrity, only those fields of the PSW are restored that could have otherwise been restored by a program operating in problem state.

    Method and means providing static dictionary structures for compressing character data and expanding compressed data
    7.
    发明授权
    Method and means providing static dictionary structures for compressing character data and expanding compressed data 失效
    提供用于压缩字符数据和扩展压缩数据的静态字典结构的方法和方法

    公开(公告)号：US5442350A

    公开(公告)日：1995-08-15

    申请号：US968631

    申请日：1992-10-29

    申请人： Balakrishna R. Iyer ,  Clark Kurtz ,  Kenneth E. Plambeck ,  Bhaskar Sinha

    发明人： Balakrishna R. Iyer ,  Clark Kurtz ,  Kenneth E. Plambeck ,  Bhaskar Sinha

    IPC分类号： G06F5/00 ,  G06F12/00 ,  G06F17/30 ,  G06T9/00 ,  H03M7/30 ,  H03M7/40

    CPC分类号： G06F17/30595 ,  G06T9/005 ,  H03M7/3088

    摘要： Ziv-Lempel-type compression and expansion using separate static compression and expansion dictionaries as opposed to a single adaptive dictionary. The static dictionaries make random access processes usable for short data records instead of only long sequential data streams. Degree of compression and compression performance are improved by allowance of multiple extension characters per node and multiple children, of the same parent, that have the same first extension character. Performance is further improved by searching for matches on children of a parent and detecting a last possible match by means of fields in the parent instead of by accessing the children. Expansion performance is improved by representing in an entry not only the extension character or characters of the entry but also those of some number of ancestors of the entry, thus avoiding accessing the ancestors.

    摘要翻译： Ziv-Lempel型压缩和扩展使用单独的静态压缩和扩展字典而不是单个自适应字典。 静态字典使随机访问过程可用于短数据记录，而不仅仅是长连续的数据流。 通过允许具有相同第一扩展字符的同一父节点的每个节点和多个子节点允许多个扩展字符来提高压缩和压缩性能。 通过搜索父母的子项的匹配并通过父项中的字段检测最后可能的匹配来进一步提高性能，而不是访问子级。 通过在条目中不仅表示条目的扩展字符或字符，而且在条目的一些数量的祖先中表示扩展性能，从而避免访问祖先。

    Method and system for adaptively building a static Ziv-Lempel dictionary for database compression
    9.
    发明授权
    Method and system for adaptively building a static Ziv-Lempel dictionary for database compression 失效
    用于自适应构建静态Ziv-Lempel字典进行数据库压缩的方法和系统

    公开(公告)号：US5412384A

    公开(公告)日：1995-05-02

    申请号：US288675

    申请日：1994-08-10

    申请人： Chung-Chia Chang ,  Gregory L. Davoll ,  Mohamed H. El-Ruby ,  Craig A. Friske ,  Balakrishna R. Iyer ,  John P. Lazarus ,  David Wilhite ,  Kenneth E. Plambeck

    发明人： Chung-Chia Chang ,  Gregory L. Davoll ,  Mohamed H. El-Ruby ,  Craig A. Friske ,  Balakrishna R. Iyer ,  John P. Lazarus ,  David Wilhite ,  Kenneth E. Plambeck

    IPC分类号： G06F5/00 ,  G06T9/00 ,  H03M7/30 ,  H03M7/46 ,  H03M7/38

    CPC分类号： H03M7/3088 ,  G06T9/005

    摘要： A system for creating a static data compression dictionary adapted to a hardware-based data compression architecture. A static Ziv-Lempel dictionary is created and stored in memory for use in compressing database records. No data compression occurs during dictionary construction. A fixed-size Ziv-Lempel parse-tree is adapted to database characteristics in one of two alternate ways. First, the parse-tree is overbuilt substantially and then pruned back to a static size by eliminating the least recently used (LRU) nodes having the lowest use count. Alternatively, the parse-tree is built to a static size and thereafter selected nodes are replaced with new nodes upon database sampling. This node recycling procedure chooses the least-useful nodes for replacement according to a use count and LRU strategy while exhausting the database sample. The pruned Ziv-Lempel parse-tree is then transformed to a static dictionary configuration and stored in memory for use in a hardware-based database compression procedure. Completion of the static dictionary before starting data compression eliminates the initial compression inefficiencies well-known for the Ziv-Lempel procedure. The parse-tree construction is enhanced by initializing the tree with NULL and DEFAULT sequences from database definitions before examining any data.

    摘要翻译： 一种用于创建适用于基于硬件的数据压缩架构的静态数据压缩字典的系统。 静态Ziv-Lempel字典被创建并存储在内存中用于压缩数据库记录。 字典构造期间不发生数据压缩。 固定大小的Ziv-Lempel解析树以两种备选方式之一适用于数据库特征。 首先，解析树被大量覆盖，然后通过消除具有最低使用次数的最近最少使用的（LRU）节点将其修剪回静态大小。 或者，解析树被构建为静态大小，此后在数据库采样时，所选择的节点被新节点替换。 该节点回收过程根据使用次数和LRU策略选择最不利的节点进行替换，同时耗尽数据库样本。 修剪后的Ziv-Lempel解析树然后转换为静态字典配置，并存储在内存中，用于基于硬件的数据库压缩过程。 开始数据压缩之前完成静态字典消除了Ziv-Lempel过程众所周知的初始压缩效率低下。 在检查任何数据之前，通过从数据库定义中初始化具有NULL和DEFAULT序列的树来增强解析树结构。