Method to measure tool wear from process model parameters
    1.
    发明申请
    Method to measure tool wear from process model parameters 审中-公开
    从过程模型参数测量刀具磨损的方法

    公开(公告)号:US20080161959A1

    公开(公告)日:2008-07-03

    申请号:US11998884

    申请日:2007-12-03

    IPC分类号: G06F17/00

    摘要: A system and method for monitoring tool wear in CNC machining operations by monitoring spindle power and extracting instantaneous cutting geometry. The method is based on a physics-based two parameter process model and measuring at two different cutting conditions. The process model parameters are measured with easily accessible spindle power. In contrast to spindle power alone which is influenced by many factors, most especially by variable cutting conditions and by the tool condition, the process model parameters are independent of the geometrically variable cutting conditions and provide a simple and direct measure of tool wear. The two process model parameters change differently depending on the mechanism of the tool wear, specifically flank wear versus cutting edge degradation. This provides a diagnostic for tool wear.

    摘要翻译: 通过监控主轴功率和提取瞬时切割几何,可以在CNC加工操作中监控刀具磨损的系统和方法。 该方法基于物理学两参数过程模型,并在两种不同的切割条件下进行测量。 使用容易接近的主轴功率测量过程模型参数。 与单独的主轴功率相反,这受到许多因素的影响,特别是通过可变切割条件和刀具条件,过程模型参数与几何可变切削条件无关,并提供了刀具磨损的简单直接测量。 两个过程模型参数根据刀具磨损的机理而异,特别是侧面磨损与切削刃退化有关。 这提供了刀具磨损的诊断。

    Hook
    2.
    外观设计
    Hook 有权

    公开(公告)号:USD803669S1

    公开(公告)日:2017-11-28

    申请号:US29569260

    申请日:2016-06-24

    申请人: Min Xu

    设计人: Min Xu

    Trace collection for a virtual machine
    3.
    发明授权
    Trace collection for a virtual machine 有权
    虚拟机的跟踪收集

    公开(公告)号:US08832682B2

    公开(公告)日:2014-09-09

    申请号:US12058545

    申请日:2008-03-28

    IPC分类号: G06F9/455

    摘要: One embodiment is a computer-implemented method of trace collection for a virtual machine that includes: executing a sequence of instructions from an initial state of the virtual machine; accessing an event log of data relating to nondeterministic events, which data includes an execution point; making at least a portion of the data available to the virtual machine when the sequence reaches the execution point; collecting trace information in response to expansion parameters; and storing the trace information in a trace file.

    摘要翻译: 一个实施例是用于虚拟机的跟踪收集的计算机实现的方法,包括:从虚拟机的初始状态执行指令序列; 访问与非确定性事件有关的数据的事件日志,所述数据包括执行点; 当所述序列到达所述执行点时,使所述数据的至少一部分可用于所述虚拟机; 根据扩展参数收集跟踪信息; 并将跟踪信息存储在跟踪文件中。

    Network searching method and device for CDMA single-mode chip multi-standby terminal
    5.
    发明申请
    Network searching method and device for CDMA single-mode chip multi-standby terminal 审中-公开
    CDMA单模芯片多待机终端的网络搜索方法和装置

    公开(公告)号:US20130170486A1

    公开(公告)日:2013-07-04

    申请号:US13819254

    申请日:2011-03-03

    IPC分类号: H04W8/02

    CPC分类号: H04W8/02 H04W48/18 H04W88/06

    摘要: The present invention discloses a network searching method and device for a CDMA single-mode chip multi-standby terminal. The method comprises: a CDMA single-mode chip multi-standby terminal extracting Preferred Roaming Lists (PRLs) of multiple users who possess the terminal (S102); merging the PRLs of the multiple users who possess the terminal to acquire a union of the PRLs of the multiple users who possess the terminal (S104), and making a network decision for the CDMA single-mode chip multi-standby terminal according to the union of the PRLs of the multiple users who possess the terminal (S106). The terminal performs a union operation on two PRLs and obtains a common PRL as the basis for network search, thus the present invention solves the problem that the CDMA single-mode chip terminal can not implement the network search for multiple users, and further achieves the effect of improving the user experience.

    摘要翻译: 本发明公开了一种用于CDMA单模芯片多待机终端的网络搜索方法和装置。 该方法包括:提取拥有终端的多个用户的优选漫游列表(S102)的CDMA单模芯片多待机终端; 合并具有终端的多个用户的PRL以获得具有该终端的多个用户的PRL的并集(S104),并且根据联合对CDMA单模芯片多待机终端进行网络决定 的具有终端的多个用户的PRL(S106)。 该终端对两个PRL执行联合操作并获得一个公共PRL作为网络搜索的基础,因此本发明解决了CDMA单模芯片终端不能实现对多个用户的网络搜索的问题,并且进一步实现了 改善用户体验的效果。

    Virtual machine fault tolerance
    7.
    发明授权
    Virtual machine fault tolerance 有权
    虚拟机容错

    公开(公告)号:US08201169B2

    公开(公告)日:2012-06-12

    申请号:US12484640

    申请日:2009-06-15

    IPC分类号: G06F9/455 G06F9/46 G06F11/00

    摘要: In a computer system running a primary virtual machine (VM) on virtualization software on a primary virtualized computer system (VCS) and running a secondary VM on virtualization software on a secondary VCS, a method for the secondary VM to provide quasi-lockstep fault tolerance for the primary VM includes: as the primary VM is executing a workload, virtualization software in the primary VCS is: (a) causing predetermined events to be recorded in an event log, (b) keeping output associated with the predetermined events pending, and (c) sending the log entries to the virtualization software in the secondary VCS; as the secondary VM is replaying the workload, virtualization software in the secondary VCS is: (a) sending acknowledgements indicating that log entries have been received; (b) when the virtualization software encounters one of the predetermined events, searching the log entries to determine whether a log entry corresponding to the same event was received from the primary VCS, and if so, comparing data associated with the predetermined event produced by the secondary VM with that of the primary VM; if there is a match, the virtualization software in the secondary VCS transmitting an acknowledgement to the virtualization software in the primary VCS; one of the virtualization software in the primary or secondary VCS dropping the event and the other dispatching the output; and if there is no match, performing a checkpoint resynchronization.

    摘要翻译: 在主虚拟化计算机系统(VCS)上的虚拟化软件上运行主虚拟机(VM)并在辅助VCS上运行虚拟化软件上的辅助虚拟机的计算机系统中,辅助虚拟机提供准锁步骤容错 对于主虚拟机包括:当主虚拟机正在执行工作负载时,主VCS中的虚拟化软件是:(a)使事件日志中记录预定事件,(b)保持与预定事件挂起的输出挂起,以及 (c)将日志条目发送到二级VCS中的虚拟化软件; 当辅助虚拟机正在重播工作负载时,辅助VCS中的虚拟化软件是:(a)发送指示已经接收到日志条目的确认; (b)当虚拟化软件遇到预定事件之一时,搜索日志条目以确定是否从主VCS接收到与同一事件相对应的日志条目,如果是,则将与由该VCS生成的预定事件相关联的数据进行比较 辅助虚拟机与主虚拟机的辅助虚拟机; 如果存在匹配,则次级VCS中的虚拟化软件向主VCS中的虚拟化软件发送确认; 主要或次要VCS中的虚拟化软件之一放弃事件,另一个调度输出; 如果没有匹配,则执行检查点重新同步。

    METHOD AND SYSTEM FOR USING A VIRTUALIZATION SYSTEM TO IDENTIFY DEADLOCK CONDITIONS IN MULTI-THREADED PROGRAMS BY CONTROLLING SCHEDULING IN REPLAY
    8.
    发明申请
    METHOD AND SYSTEM FOR USING A VIRTUALIZATION SYSTEM TO IDENTIFY DEADLOCK CONDITIONS IN MULTI-THREADED PROGRAMS BY CONTROLLING SCHEDULING IN REPLAY 有权
    使用虚拟化系统通过控制重排调度来识别多线程程序中的死锁条件的方法和系统

    公开(公告)号:US20120030657A1

    公开(公告)日:2012-02-02

    申请号:US12848023

    申请日:2010-07-30

    申请人: Qi Gao Min Xu

    发明人: Qi Gao Min Xu

    IPC分类号: G06F9/44

    CPC分类号: G06F9/524 G06F11/3636

    摘要: A method and system for determining potential deadlock conditions in a target multi-threaded software application. The target application is first run in a virtual machine and the events within the application are recorded. The recorded events are replayed and analyzed to identify potential lock acquisition conflicts occurring between threads of the application. The potential lock acquisition conflicts are identified by analyzing the order in which resource locks are obtained and pairs of resources that have respective locks obtained in different orders are analyzed. These analyzed pairs are used to define a different order of events in the target application that, when the target application is re-run with the second order of events, may trigger a deadlock condition. The target application is then re-run with the different order of events in an attempt to trigger and then identify potential deadlock situations.

    摘要翻译: 一种用于确定目标多线程软件应用程序中潜在的死锁状况的方法和系统。 目标应用程序首先在虚拟机中运行,并记录应用程序中的事件。 记录的事件被重放和分析,以识别在应用程序的线程之间发生的潜在锁定获取冲突。 通过分析获得资源锁定的顺序来识别潜在锁获取冲突,并分析具有以不同顺序获得的相应锁的资源对。 这些分析的对用于定义目标应用程序中不同的事件顺序,当目标应用程序以二次事件重新运行时,可能会触发死锁条件。 然后,目标应用程序以不同的事件顺序重新运行,以尝试触发,然后识别潜在的死锁情况。

    Power Supply Equalization Circuit Using Distributed High-Voltage and Low-Voltage Shunt Circuits
    10.
    发明申请
    Power Supply Equalization Circuit Using Distributed High-Voltage and Low-Voltage Shunt Circuits 有权
    使用分布式高压和低压分流电路的电源均衡电路

    公开(公告)号:US20100238599A1

    公开(公告)日:2010-09-23

    申请号:US12406705

    申请日:2009-03-18

    IPC分类号: H02H9/04

    CPC分类号: H03K19/00315

    摘要: Embodiments of an IC protection circuit that protects low voltage supply transistors and circuits within the IC from excessive power supply levels and ESD events are described. A protection circuit situated between the IO pins of the IC and the internal circuitry of the IC includes a voltage drop network and a plurality of shunt circuits to protect the IC against excessive supply voltages and ESD voltages, or other excessive current conditions. Each shunt circuit includes an RC trigger stage and an NMOS shunt stage that are made using low-voltage devices. A protection circuit of the embodiments includes a high voltage IO pin, a voltage drop network to drop a high voltage on the IO pin to a low voltage level on a floating voltage rail, a first shunt circuit coupled between the floating supply rail and ground, an equalizer circuit coupled between the floating supply rail and a low voltage supply rail, and a second shunt circuit coupled to the equalizer circuit through the low voltage supply rail.

    摘要翻译: 描述了保护IC内的低压电源晶体管和电路免受过多电源电平和ESD事件的IC保护电路的实施例。 位于IC的IO引脚和IC内部电路之间的保护电路包括一个压降网络和多个分流电路,以保护IC免受过多的电源电压和ESD电压或其他过大的电流条件的影响。 每个并联电路包括使用低电压器件制造的RC触发级和NMOS分流级。 实施例的保护电路包括高电压IO引脚,降压网络,以将IO引脚上的高电压降低到浮置电压轨上的低电压电平;耦合在浮动电源轨和地之间的第一分流电路, 耦合在浮动电源轨和低电压电源轨之间的均衡器电路,以及通过低压供电轨耦合到均衡器电路的第二分流电路。