公开(公告)号：US06426649B1

公开(公告)日：2002-07-30

申请号：US09751440

申请日：2000-12-29

申请人： Robert Fu ,  David D. Eaton ,  Kevin K. Yee ,  Andrew K. Chan

发明人： Robert Fu ,  David D. Eaton ,  Kevin K. Yee ,  Andrew K. Chan

IPC分类号： H03K738

CPC分类号： H03K19/17736 ,  H03K19/1774 ,  H03K19/17744 ,  H03K19/1778 ,  H03L7/183

摘要： A field programmable gate array includes a programmable interconnect structure and plurality of logic cells. The logic cells each include a number of combinatorial logic circuits, which have direct interconnections with the programmable interconnect structure, and a plurality of sequential logic element, such as D type flip-flops that acts as registers. The combinatorial logic circuits may be directly connected to the programmable interconnect structure as well as connected to the input terminals of the sequential logic elements. Consequently, the logic cells include both combinatorial and registered connections with the programmable interconnect structure. Moreover, one of the sequential elements may selectively receive a dedicated input from the programmable interconnect structure. The output leads of the logic cell is connected to the programmable interconnect structure through a driver that includes a protection transistor. The gate of the protection transistor is coupled to a primary charge pump that is shared with multiple drivers as well as a secondary charge pump associated with the driver.

摘要翻译： 现场可编程门阵列包括可编程互连结构和多个逻辑单元。 每个逻辑单元包括与可编程互连结构具有直接互连的多个组合逻辑电路，以及用作寄存器的多个顺序逻辑元件，例如D型触发器。 组合逻辑电路可以直接连接到可编程互连结构，并且连接到顺序逻辑元件的输入端。 因此，逻辑单元包括与可编程互连结构的组合和注册连接。 此外，顺序元件之一可以选择性地从可编程互连结构接收专用输入。 逻辑单元的输出引线通过包括保护晶体管的驱动器连接到可编程互连结构。 保护晶体管的栅极耦合到与多个驱动器共享的主电荷泵以及与驱动器相关联的次级电荷泵。

公开(公告)号：US06552410B1

公开(公告)日：2003-04-22

申请号：US09650773

申请日：2000-08-29

申请人： David D. Eaton ,  Ket-Chong Yap ,  Kevin K. Yee ,  E. Thomas Hart ,  Andrew K. Chan ,  Neal A. Palmer ,  Michael W. Dini ,  James Apland ,  Panawalge S. N. Gunaratna

发明人： David D. Eaton ,  Ket-Chong Yap ,  Kevin K. Yee ,  E. Thomas Hart ,  Andrew K. Chan ,  Neal A. Palmer ,  Michael W. Dini ,  James Apland ,  Panawalge S. N. Gunaratna

IPC分类号： H01L2200

CPC分类号： H03K19/1776 ,  H03K19/17732 ,  H03K19/17744

摘要： A programmable circuit, such as a field programmable gate array, and a dedicated device, such as an ASIC type device, are coupled together with an antifuse based interface on a single integrated circuit. A configurable non-volatile memory that communicates with the dedicated device is also located on the integrated circuit. The platform for the programmable circuit is one half of an existing programmable circuit, which eliminates the need to engineer the programmable circuit. The programmable circuit includes a clock network that receives clock signals from clock terminals as well as from a clock network in the dedicated device. The interface between the dedicated device and programmable circuit includes a number of conductors with buffers with testing circuitry. The testing circuitry includes a PMOS test transistor and a NMOS test transistor which permits testing of the buffers without programming the antifuses coupled to the conductors. The input/output terminals around the periphery and in the interface between the programmable circuit and dedicated device are tested using JTAG registers. The path of the test signal through the JTAG registers is selectable to pass around the periphery of both the programmable and dedicated devices or through the interface and around the periphery of only one of the programmable and dedicated devices.

摘要翻译： 诸如现场可编程门阵列的可编程电路以及诸如ASIC类型器件的专用器件在单个集成电路上与基于反熔丝的接口耦合在一起。 与专用设备通信的可配置非易失性存储器也位于集成电路上。 可编程电路的平台是现有可编程电路的一半，无需设计可编程电路。 可编程电路包括时钟网络，其从时钟端子以及专用器件中的时钟网络接收时钟信号。 专用器件和可编程电路之间的接口包括具有带测试电路的缓冲器的多个导体。 测试电路包括PMOS测试晶体管和NMOS测试晶体管，其允许对缓冲器进行测试而不编程耦合到导体的反熔丝。 使用JTAG寄存器测试周边和可编程电路与专用设备之间的接口中的输入/输出端子。 通过JTAG寄存器的测试信号的路径可选择通过可编程和专用设备的周边，或通过接口和仅可编程和专用设备之一的外围环绕。

公开(公告)号：US06519753B1

公开(公告)日：2003-02-11

申请号：US09451681

申请日：1999-11-30

申请人： Roger Ang ,  Atul Ahuja ,  Mukesh T. Lulla ,  Drazen Borkovic ,  Brian D. Small ,  Charles C. Tralka ,  Andrew K. Chan ,  Kevin K. Yee

发明人： Roger Ang ,  Atul Ahuja ,  Mukesh T. Lulla ,  Drazen Borkovic ,  Brian D. Small ,  Charles C. Tralka ,  Andrew K. Chan ,  Kevin K. Yee

IPC分类号： G06F1750

CPC分类号： H03K19/17768 ,  G06F17/5054 ,  H03K19/17732

摘要： A programmable device, such as a field programmable gate array, includes a main field that is programmable by the user and at least one embedded portion that is reserved to be programmed with a standard circuit design that is configured, for example, by the manufacturer. The embedded portion is similar to the main field, i.e., it has the same programmable structure, however, the embedded portion is not accessible to the user. In some embodiments, the embedded portion may be pre-programmed with the standard circuit design and in other embodiments the embedded portion is programmed while the user programs the main field. The programmable device may also include signature bits that are used by the programming unit to identify the programmable device as having the embedded portion and which standard circuit design to program into the embedded portion. The signature bit may be programmed after the manufacture of the programmable device or may be hard wired during the manufacture of the device. The programming unit recognizes the configuration of the signature bits and restricts access to embedded portion based on the configuration.

摘要翻译： 诸如现场可编程门阵列的可编程设备包括可由用户编程的主场和被保留用例如由制造商配置的标准电路设计进行编程的至少一个嵌入部分。 嵌入部分类似于主字段，即它具有相同的可编程结构，然而，嵌入部分不能被用户访问。 在一些实施例中，嵌入部分可以用标准电路设计进行预编程，而在其他实施例中，嵌入部分被编程，同时用户编程主字段。 可编程设备还可以包括由编程单元用于将可编程设备识别为具有嵌入部分和哪个标准电路设计编程到嵌入部分中的签名位。 签名位可以在可编程设备的制造之后编程，或者可以在设备的制造期间被硬接线。 编程单元识别签名比特的配置，并基于配置限制对嵌入部分的访问。

公开(公告)号：US5900742A

公开(公告)日：1999-05-04

申请号：US667783

申请日：1996-06-21

申请人： Paige A. Kolze ,  William D. Cox ,  Kevin K. Yee

发明人： Paige A. Kolze ,  William D. Cox ,  Kevin K. Yee

IPC分类号： H03K19/177

CPC分类号： H03K19/17744 ,  H03K19/1778

摘要： An interface cell for a programmable integrated circuit includes a pad, an input buffer, a first routing conductor, a plurality of second routing conductors, and a plurality of antifuses. The input of the input buffer is coupled to the pad and the output of the input buffer is coupled to the first routing conductor so that an input signal from the pad can be supplied onto the first routing conductor without passing through any programmed antifuses. The second routing conductors extend parallel to one another in a direction perpendicular to the direction in which the first routing conductor extends. The second routing conductors cross the first routing conductor and then pass out of the interface cell and into a routing channel of the programmable integrated circuit. One of the antifuses is disposed at each location where one of the second routing conductors crosses the first routing conductor. Accordingly, an input signal from the pad can be supplied onto any desired one of the second routing conductors of the routing channel by programming only one antifuse. The interface cell contains an enablable register, the control inputs of which can be independently driven from any conductor in the adjacent routing channel. Combinatorial and registered outputs of the interface cell can be simultaneously routed to the routing channel and some interface cell outputs have 2.times. drive strength.

摘要翻译： 用于可编程集成电路的接口单元包括衬垫，输入缓冲器，第一布线导体，多个第二布线导体以及多个反熔丝。 输入缓冲器的输入耦合到焊盘，并且输入缓冲器的输出耦合到第一布线导体，使得来自焊盘的输入信号可以被提供到第一布线导体上，而不通过任何编程的反熔丝。 第二布线导体在垂直于第一布线导体延伸的方向的方向上彼此平行延伸。 第二路由导体穿过第一路由导体，然后从接口单元传出并进入可编程集成电路的路由信道。 一个反熔丝设置在每个位置，其中一个第二布线导体与第一布线导体交叉。 因此，通过仅编程一个反熔丝，可以将来自焊盘的输入信号提供给路由通道的任何所需的第二路由导体。 接口单元包含一个可用的寄存器，其控制输入可以独立地从相邻路由通道中的任何导体驱动。 接口单元的组合和注册输出可以同时路由到路由通道，一些接口单元输出具有2x驱动强度。