-
公开(公告)号：US07633287B2
公开(公告)日：2009-12-15
申请号：US12255783
申请日：2008-10-22
CPC分类号： H01F3/10 , H01F3/14 , H01F17/0033 , H01F27/346 , H01F30/16 , H01F38/30 , H01F2027/2814
摘要： A core is divided by alternately arranging plural magnetic material portions and plural non-magnetic material portions in a circumferential direction of the core through which a primary conductor penetrates. A conductor is wound around the core under conditions in which each core cross section of the core intersects the magnetic material portion and the non-magnetic material portion, each core cross section including a cut end surface of each conductor of a secondary winding wound around the core, and a ratio of a magnetic material portion cross-sectional area of the magnetic material portion to a non-magnetic material portion cross-sectional area of the non-magnetic material portion at the core cross section is kept constant at each core cross section.
摘要翻译： 通过在芯的圆周方向上交替布置多个磁性材料部分和多个非磁性材料部分来分割芯体，初级导体穿过芯部。 在核心的每个芯横截面与磁性材料部分和非磁性材料部分相交的条件下，导体缠绕在芯体周围，每个芯部横截面包括缠绕在第二绕组上的次级绕组的每个导体的切割端面 磁芯部分的磁性材料部分横截面积与芯部横截面处的非磁性材料部分的非磁性材料部分横截面积的比率在每个芯部横截面保持恒定 。
-
公开(公告)号：US20090261813A1
公开(公告)日：2009-10-22
申请号：US12255783
申请日：2008-10-22
IPC分类号： G01R19/00
CPC分类号： H01F3/10 , H01F3/14 , H01F17/0033 , H01F27/346 , H01F30/16 , H01F38/30 , H01F2027/2814
摘要： A core is divided by alternately arranging plural magnetic material portions and plural non-magnetic material portions in a circumferential direction of the core through which a primary conductor penetrates. A conductor is wound around the core under conditions in which each core cross section of the core intersects the magnetic material portion and the non-magnetic material portion, each core cross section including a cut end surface of each conductor of a secondary winding wound around the core, and a ratio of a magnetic material portion cross-sectional area of the magnetic material portion to a non-magnetic material portion cross-sectional area of the non-magnetic material portion at the core cross section is kept constant at each core cross section.
摘要翻译： 通过在芯的圆周方向上交替布置多个磁性材料部分和多个非磁性材料部分来分割芯体，初级导体穿过芯部。 在核心的每个芯横截面与磁性材料部分和非磁性材料部分相交的条件下，导体缠绕在芯体周围，每个芯部横截面包括缠绕在第二绕组上的次级绕组的每个导体的切割端面 磁芯部分的磁性材料部分横截面积与芯部横截面处的非磁性材料部分的非磁性材料部分横截面积的比率在每个芯部横截面保持恒定 。
-
公开(公告)号：US09525289B2
公开(公告)日：2016-12-20
申请号：US14381817
申请日：2013-02-08
申请人： Tadahiro Yoshida
发明人： Tadahiro Yoshida
CPC分类号： H02J7/0014 , G01R31/3606 , H01M10/425 , H01M10/482 , H01M10/486 , H01M2010/4271 , H02J7/0016 , H02J7/0021 , H02J7/0026 , H02J7/007 , H02J7/0091
摘要： A battery control unit (400) controls charge and discharge of battery cells (100) on the basis of temperatures measured by a temperature measurement unit (320) and voltages measured by the voltage and current measurement unit (340). In addition, the battery control unit (400) specifies a lowest temperature cell having the lowest temperature and a highest temperature cell having the highest temperature on the basis of the temperatures measured by the temperature measurement unit (320), when a current is greater than 0. In addition, the battery control unit (400) performs balance control for equalizing voltages of all the battery cells (100), on the basis of the voltages measured by the voltage and current measurement unit (340), when a first temperature condition in which a temperature difference ΔT between the highest temperature cell and the lowest temperature cell is equal to or greater than a reference value T1 is not satisfied. On the other hand, when the temperature difference ΔT satisfies the first temperature condition, the battery control unit (400) does not perform the balance control.
摘要翻译： 电池控制单元（400）基于由温度测量单元（320）测量的温度和由电压和电流测量单元（340）测量的电压来控制电池单元（100）的充电和放电。 此外，电池控制单元400根据由温度测量单元320测量的温度，指定具有最低温度的最低温度单元和具有最高温度的最高温度单元，当电流大于 此外，电池控制单元400基于由电压和电流测量单元（340）测量的电压，执行用于均衡所有电池单元（100）的电压的平衡控制，当第一温度条件 其中最高温度单元和最低温度单元之间的温度差ΔT等于或大于参考值T1。 另一方面，当温度差ΔT满足第一温度条件时，电池控制单元（400）不执行平衡控制。
-
公开(公告)号：US20130100587A1
公开(公告)日：2013-04-25
申请号：US13806202
申请日：2010-09-13
IPC分类号： H02B13/045
CPC分类号： H02B13/045 , H02B1/56 , H02B13/0358
摘要： A gas-insulated electric device, by which a cross-sectional area of a central conductor can be reduced. The gas-insulated electric device includes an insulation tube that ranges to portions facing to ground potential portions for a central conductor and to upper-lower portions along the grounding potential portions, and is coaxially arranged along the central conductor in a state where a gap intervenes between the central conductor and the insulation tube; a conductive layer that is formed on an inner surface of an insulation tube and is electrically connected to the central conductor; and a ground layer that is formed on an inner surface or an outer surface of the insulation tube and is grounded; in which heat generated from the central conductor is radiated by convecting the insulation gas through the gap between the central conductor and insulation tube.
摘要翻译： 一种气体绝缘电气装置，可以减小中心导体的横截面积。 气体绝缘电气装置包括绝缘管，其范围为面向中心导体的地电位部分的部分和沿着接地电位部分的上下部分，并且在间隙干涉的状态下沿着中心导体同轴布置 在中心导体和绝缘管之间; 导电层，其形成在绝缘管的内表面上并与中心导体电连接; 以及形成在绝缘管的内表面或外表面上并接地的接地层; 其中通过将绝缘气体通过中心导体和绝缘管之间的间隙对流而辐射从中心导体产生的热量。
-
公开(公告)号：US06631486B1
公开(公告)日：2003-10-07
申请号：US09405015
申请日：1999-09-27
申请人： Yoshihide Komatsu , Tadahiro Yoshida , Yukio Arima
发明人： Yoshihide Komatsu , Tadahiro Yoshida , Yukio Arima
IPC分类号： G01R3128
CPC分类号： G01R31/31905 , G01R31/31926
摘要： A test enable signal Data_En is output from a data generator 11 in a tester 10 to a device under a test (DUT) 20. In the DUT 20, a first logic circuit 21 converts a signal pattern with an ordinary transfer rate, which has been stored on a register 28, into a high-transfer-rate signal pattern SpeedData_Tx with a high rate. And a transmitter 22 transmits the high-transfer-rate signal. During a test, the high-transfer-rate signal transmitted is received by, a receiver 23 with a switch 24 turned ON. Then, the high-transfer-rate signal received is output to a second logic circuit 26, which converts the high-transfer-rate signal into a low-transfer-rate signal Data_Rx with an ordinary rate. Finally, the low-transfer-rate signal is output to the tester 10 and compared to an expected value thereof by a comparator 12. In this manner, a semiconductor device operating at a high speed can be tested using a tester operating at a lower speed.
摘要翻译： 测试使能信号Data_En从测试器10中的数据发生器11输出到被测设备（DUT）20。在DUT 20中，第一逻辑电路21以一般传输速率转换信号模式 存储在寄存器28中，以高速率转换成高传输速率信号模式SpeedData_Tx。 并且发射机22发送高传输速率信号。 在测试期间，传输的高传输速率信号由开关24接通的接收机23接收。 然后，所接收的高传输速率信号被输出到第二逻辑电路26，第二逻辑电路26将高传输速率信号以普通速率转换成低传输速率信号Data_Rx。 最后，将低传输速率信号输出到测试器10，并通过比较器12与其期望值进行比较。以这种方式，可以使用以较低速度操作的测试仪来测试以高速工作的半导体器件 。
-
公开(公告)号：US06498519B1
公开(公告)日：2002-12-24
申请号：US09498339
申请日：2000-02-04
申请人： Yutaka Terada , Hiroyuki Yamauchi , Hironori Akamatsu , Tadahiro Yoshida , Satoshi Takahashi , Takashi Hirata , Yukio Arima , Yoshihide Komatsu
发明人： Yutaka Terada , Hiroyuki Yamauchi , Hironori Akamatsu , Tadahiro Yoshida , Satoshi Takahashi , Takashi Hirata , Yukio Arima , Yoshihide Komatsu
IPC分类号： H03K5153
CPC分类号： G01R19/16547
摘要： A voltage control circuit for implementing, e.g., the CPS function in which a high-accuracy comparison is performed between a high external voltage and a reference voltage. A diode-connected transistor converts the external voltage to a voltage lower than the external voltage in conjunction with an external voltage dropping resistor. A comparator compares the converted voltage with a specified comparison voltage. The size of the transistor is determined such that the ratio of an increment of the converted voltage to an increment of the external voltage is sufficiently high in a comparison region in which the external voltage is close to the reference voltage. A clamping circuit clamps the converted voltage with a specified limit voltage such that the converted voltage does not exceed the withstand voltage of the circuit.
摘要翻译： 一种用于实现例如在高外部电压和参考电压之间进行高精度比较的CPS功能的电压控制电路。 二极管连接的晶体管将外部电压转换为低于外部电压的电压，并结合外部降压电阻。 比较器将转换的电压与指定的比较电压进行比较。 确定晶体管的尺寸，使得在外部电压接近参考电压的比较区域中，转换电压的增量与外部电压的增量的比率足够高。 钳位电路以转换后的电压将指定的极限电压钳位，使转换后的电压不超过电路的耐压。
-
7.发明授权Camera system with plural interchangeable accessories sharing a common serial data bus 失效具有多个可互换配件的相机系统共享一个通用的串行数据总线
公开(公告)号：US4816853A
公开(公告)日：1989-03-28
申请号：US820656
申请日：1986-01-21
申请人： Yoshiiku Kikukawa , Masayuki Nakasa , Tadahiro Yoshida , Mashio Kitaura , Masaaki Nakai , Takanobu Omaki , Nobuyuki Taniguchi
发明人： Yoshiiku Kikukawa , Masayuki Nakasa , Tadahiro Yoshida , Mashio Kitaura , Masaaki Nakai , Takanobu Omaki , Nobuyuki Taniguchi
摘要： A camera system including a camera body and a camera accessory attachable to the camera body, such as an interchangeable back lid, an interchangeable lens, a flash device and so on, is disclosed. In the system, a plurality of circuits provided in the plurality of camera accessories are controlled by a microcomputer provided in the camera body. Data is transmitted between the microcomputer and the circuits using a serial data bus and synchronizing clock line connected therebetween. The circuit to receive the data sent from the microcomputer, or the circuit which should send the data to the microcomputer are selected by the microcomputer through chip select lines provided between the microcomputer and each circuit.
摘要翻译： 公开了一种照相机系统，其包括相机主体和附接到照相机主体的相机附件，诸如可互换后盖，可互换镜头，闪光灯装置等。 在该系统中，设置在多个照相机附件中的多个电路由设置在相机机体中的微型计算机控制。 使用串行数据总线在微机和电路之间传输数据，同时连接其间的同步时钟线。 由微型计算机通过微型计算机和各电路之间提供的芯片选择线选择接收从微型计算机发送的数据的电路，或将数据发送到微机的电路。
-
公开(公告)号：US4623151A
公开(公告)日：1986-11-18
申请号：US721702
申请日：1985-04-10
CPC分类号： F02G1/0535 , F02G2243/00 , F02G2243/08 , F02G2253/00 , F02G2253/03 , F02G2253/08 , F02G2270/50 , F02G2270/85 , F02G2275/40 , Y10S277/902
摘要： A seal means for use in the Stirling engine or the like, the seal means comprising: a cylinder including a piston reciprocating therein, and a buffer chamber located in one of the spaces produced at the both sides of the piston; a tank for storing the working fluid in the buffer chamber when the engine is at rest, the tank being located outside the cylinder; a means for introducing the working fluid in the tank into the buffer chamber under pressure when the engine is started; a crank shaft driven by means of the piston through a piston rod; a crankcase for accommodating the crank shaft; a plurality of packings for preventing the working fluid in the buffer chamber from entering the crankcase by flowing along the outer surface of the moving piston rod, the packings being arranged in contact with the outer surface of the piston rod; and a means for returning the working fluid leaked in the packings from the buffer chamber through the moving piston rod to the buffer chamber.
摘要翻译： 一种在斯特林发动机等中使用的密封装置，所述密封装置包括：气缸，其包括在其中往复运动的活塞;以及缓冲室，位于活塞两侧产生的空间之一; 用于在发动机处于静止状态时将工作流体存储在缓冲室中的罐，所述罐位于所述气缸外部; 当发动机起动时，将压力下的工作流体引入缓冲室中的装置; 通过活塞通过活塞杆驱动的曲柄轴; 用于容纳曲柄轴的曲轴箱; 用于防止缓冲室中的工作流体沿着活动活塞杆的外表面流动而进入曲轴箱的多个填料，所述密封件布置成与活塞杆的外表面接触; 以及用于将填充物中泄漏的工作流体从缓冲室通过移动活塞杆返回到缓冲室的装置。
-
9.发明授权Binary digital data signal reproducing circuit in digital data transmission system 失效数字数据传输系统中的二进制数字数据信号再现电路
公开(公告)号：US4598412A
公开(公告)日：1986-07-01
申请号：US700082
申请日：1985-02-11
申请人： Tadahiro Yoshida
发明人： Tadahiro Yoshida
CPC分类号： H04L25/242
摘要： A reproducer for reproducing a binary digital data signal from a signal received at a receiver side. A pulse train is detected from the received signal at a pulse detector. Each pulse in the pulse train sets a first D-type flip-flop, which is, in turn, cleared by a clear pulse produced by a second D-type flip-flop in response to a clock pulse just after the first D-type flip-flop is set. The output of the first D-type flip-flop is applied to a data input terminal of a third D-type flip-flop and is taken into the third D-type flip-flop by the same clock pulse. The clock pulse repetition frequency is synchronous with the binary digital data signal. Thus, the reproduced binary digital data signal is obtained on an output of the third D-type flip-flop.
摘要翻译： 一种用于从在接收机侧接收的信号再现二进制数字数据信号的再现器。 在脉冲检测器处从接收到的信号检测脉冲串。 脉冲串中的每个脉冲设置第一D型触发器，该第一D型触发器又由第二D型触发器产生的清除脉冲清除，以响应刚刚在第一D型触发器之后的时钟脉冲 触发器设置。 第一D型触发器的输出被施加到第三D型触发器的数据输入端，并被相同的时钟脉冲带入第三D型触发器。 时钟脉冲重复频率与二进制数字数据信号同步。 因此，在第三D型触发器的输出上获得再现的二进制数字数据信号。
-
公开(公告)号：US4573173A
公开(公告)日：1986-02-25
申请号：US618410
申请日：1984-06-06
申请人： Tadahiro Yoshida
发明人： Tadahiro Yoshida
CPC分类号： H04L7/0338
摘要： A circuit for obtaining a clock pulse synchronized to a data signal received at a receiving side, which has a plurality of clock pulses having a repetition frequency equal to that of a clock in a transmission side but being different from one another in phase. On reception of the first data bit of the received data signal, the timing of the first data bit is detected at a detection circuit in reference to the plurality of clock pulses. According to the detected timing, a selector circuit selects one of the plurality of clock pulses with a predetermined constant phase difference from the received data signal.The detection circuit comprises D-type flip-flops, and the selector circuit comprises AND gates.
摘要翻译： 一种用于获得与在接收侧接收的数据信号同步的时钟脉冲的电路，其具有多个时钟脉冲，所述时钟脉冲的重复频率等于发送侧的时钟的重复频率，但是彼此相位不同。 在接收到接收到的数据信号的第一数据位时，参考多个时钟脉冲在检测电路处检测第一数据位的定时。 根据检测到的定时，选择器电路从接收的数据信号中选择具有预定的恒定相位差的多个时钟脉冲之一。 检测电路包括D型触发器，选择电路包括与门。
-
-
-
-
-
-
-
-
-
搜索结果
64 条记录 (耗时 0.046 秒)
