公开(公告)号：US11980083B2

公开(公告)日：2024-05-07

申请号：US16832583

申请日：2020-03-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Keum Hee Lee ,  Joongeol Kim ,  Kap Soo Yoon ,  Woo Geun Lee ,  Seung-Ha Choi ,  Jiyun Hong

IPC: H01L51/56 ,  H10K71/00 ,  H10K71/20 ,  H10K71/60 ,  H10K102/10

CPC classification number: H10K71/00 ,  H10K71/233 ,  H10K71/60 ,  H10K2102/103

Abstract: A method of manufacturing a thin film transistor includes: forming an active pattern on a substrate; forming an insulating layer and a gate electrode layer on the active pattern in order; forming a photoresist pattern on the gate electrode layer; forming a preliminary gate electrode by wet etching the gate electrode layer using the photoresist pattern; forming an insulating pattern by dry etching the insulating layer using the photoresist pattern and the preliminary gate electrode; and forming a gate electrode by wet etching a side surface of the preliminary gate electrode using the photoresist pattern.

公开(公告)号：US10310340B2

公开(公告)日：2019-06-04

申请号：US15398554

申请日：2017-01-04

Applicant: Samsung Display Co., Ltd.

Inventor： Keum Hee Lee ,  Man Jin Kim ,  Yu Jun Kim ,  Chang Yeol Lee ,  Su Jung Jung ,  Ji Young Jeong

IPC: G02F1/1345 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/49 ,  H01L29/786 ,  G02F1/1333

Abstract: A Liquid crystal display device and manufacturing method thereof are provided. According to an exemplary embodiment of the present disclosure, an LCD device includes: a first substrate including a display area and a non-display area disposed outside of the display area; a gate electrode disposed on the first substrate and including a first-layer gate electrode and a second-layer gate electrode disposed on the first-layer gate electrode; a pixel electrode disposed on the same layer as the first-layer gate electrode; a source electrode and a drain electrode disposed on the gate electrode to be spaced from each other; and a contact connecting the drain electrode and the pixel electrode and including a first-layer contact, which is disposed on the same layer as the pixel electrode, and a second-layer contact, which is disposed on the first-layer contact.

公开(公告)号：US09515093B2

公开(公告)日：2016-12-06

申请号：US14466317

申请日：2014-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Zhu Xun ,  Jae Woo Park ,  Jae Won Song ,  Keum Hee Lee ,  June Whan Choi

IPC: H01L29/12 ,  H01L29/10 ,  H01L27/12 ,  H01L29/417 ,  H01L21/443 ,  H01L29/45 ,  H01L29/66 ,  H01L29/786 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L27/124 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/1368 ,  G02F2001/133519 ,  G02F2201/121 ,  G02F2201/123 ,  H01L21/443 ,  H01L21/76852 ,  H01L23/53238 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/66765 ,  H01L29/78618 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A thin film transistor array panel is provided as follows. A gate electrode is disposed on a substrate. A semiconductor layer is disposed on the gate electrode. A gate insulating layer is disposed between the gate electrode and the semiconductor layer. A source electrode is disposed on a first side of the semiconductor layer, having a first lateral surface. A drain electrode is disposed on a second side of the semiconductor layer, having a second lateral surface. The first and second lateral surfaces define a spacing which overlaps the gate electrode. A metal silicide layer is disposed on the first and second lateral surfaces. A passivation layer is disposed on the metal silicide layer, the source electrode and the drain electrode. The passivation layer is not in contact with the first and second lateral surfaces.

Abstract translation: 如下提供薄膜晶体管阵列面板。 栅电极设置在基板上。 半导体层设置在栅电极上。 栅极绝缘层设置在栅电极和半导体层之间。 源电极设置在半导体层的第一侧上，具有第一侧表面。 漏电极设置在半导体层的第二侧上，具有第二侧表面。 第一和第二侧表面限定了与栅电极重叠的间隔。 金属硅化物层设置在第一和第二侧表面上。 在金属硅化物层，源电极和漏电极上设置钝化层。 钝化层不与第一和第二侧表面接触。

公开(公告)号：US11961849B2

公开(公告)日：2024-04-16

申请号：US17342088

申请日：2021-06-08

Applicant: Samsung Display Co., LTD.

Inventor： Keum Hee Lee ,  Dong Hoon Shin ,  June Whan Choi ,  Seung Sok Son ,  Woo Geun Lee

IPC: H01L27/12

CPC classification number: H01L27/1248 ,  H01L27/124

Abstract: A display device includes a base layer; a first pattern disposed on the base layer; an insulating layer disposed on the first pattern and including layers; and a second pattern disposed on the insulating layer. At least two of the layers of the insulating layer include a same material.

公开(公告)号：US10032803B2

公开(公告)日：2018-07-24

申请号：US15343780

申请日：2016-11-04

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Zhu Xun ,  Jae Woo Park ,  Jae Won Song ,  Keum Hee Lee ,  June Whan Choi

IPC: H01L21/00 ,  H01L31/00 ,  H01L27/12 ,  H01L29/417 ,  H01L21/443 ,  H01L29/45 ,  H01L29/66 ,  H01L29/786 ,  H01L21/768 ,  H01L23/532 ,  G02F1/1335 ,  G02F1/1368

Abstract: A thin film transistor array panel is provided as follows. A gate electrode is disposed on a substrate. A semiconductor layer is disposed on the gate electrode. A gate insulating layer is disposed between the gate electrode and the semiconductor layer. A source electrode is disposed on a first side of the semiconductor layer, having a first lateral surface. A drain electrode is disposed on a second side of the semiconductor layer, having a second lateral surface. The first and second lateral surfaces define a spacing which overlaps the gate electrode. A metal suicide layer is disposed on the first and second lateral surfaces. A passivation layer is disposed on the metal silicide layer, the source electrode and the drain electrode. The passivation layer is not in contact with the first and second lateral surfaces.