公开(公告)号：US20210055888A1

公开(公告)日：2021-02-25

申请号：US17092860

申请日：2020-11-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHULSEUNG LEE ,  SEONGHOON WOO ,  KYUWOOK HAN ,  DAEHYUN KIM

IPC: G06F3/06 ,  G06F13/28

Abstract: A storage device includes a first memory device, a second memory device, and a controller. The first memory device and the second memory device share the same channel to communicate with the controller. Communication between the first memory device and the controller and communication between the second memory device and the controller are mutually exclusive. When the controller receives a read request directed to the second memory device while the controller processes a direct memory access (DMA) operation directed to the first memory device, the controller suspends the DMA operation and transmits a read command associated with the read request to the second memory device.

公开(公告)号：US20220413963A1

公开(公告)日：2022-12-29

申请号：US17900336

申请日：2022-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHULSEUNG LEE ,  SOON SUK HWANG ,  CHOONGEUI LEE

IPC: G06F11/10 ,  G11C29/52 ,  G06F3/06 ,  G11C7/10 ,  G11C7/22

Abstract: A storage device includes a nonvolatile memory device, and a controller that reads first data from the nonvolatile memory device. When a number of first errors of the first data is not smaller than a first threshold value, the controller determines whether the first errors include timing errors arising from a variation of signal transmission timings between the nonvolatile memory device and the controller and performs a retraining operation on the signal transmission timings when the first errors include the timing errors.

公开(公告)号：US20210200634A1

公开(公告)日：2021-07-01

申请号：US17198315

申请日：2021-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHULSEUNG LEE ,  SOON SUK HWANG ,  CHOONGEUI LEE

IPC: G06F11/10 ,  G11C29/52 ,  G06F3/06 ,  G11C7/10 ,  G11C7/22

Abstract: A storage device includes a nonvolatile memory device, and a controller that reads first data from the nonvolatile memory device. When a number of first errors of the first data is not smaller than a first threshold value, the controller determines whether the first errors include timing errors arising from a variation of signal transmission timings between the nonvolatile memory device and the controller and performs a retraining operation on the signal transmission timings when the first errors include the timing errors.

公开(公告)号：US20190354431A1

公开(公告)日：2019-11-21

申请号：US16248540

申请日：2019-01-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHULSEUNG LEE ,  SOON SUK HWANG ,  CHOONGEUI LEE

IPC: G06F11/10 ,  G11C29/52 ,  G06F3/06 ,  G11C7/10 ,  G11C7/22

Abstract: A storage device includes a nonvolatile memory device, and a controller that reads first data from the nonvolatile memory device. When a number of first errors of the first data is not smaller than a first threshold value, the controller determines whether the first errors include timing errors arising from a variation of signal transmission timings between the nonvolatile memory device and the controller and performs a retraining operation on the signal transmission timings when the first errors include the timing errors.

公开(公告)号：US20190079698A1

公开(公告)日：2019-03-14

申请号：US15960644

申请日：2018-04-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHULSEUNG LEE ,  SEONGHOON WOO ,  KYUWOOK HAN ,  DAEHYUN KIM

IPC: G06F3/06 ,  G06F13/28

Abstract: A storage device includes a first memory device, a second memory device, and a controller. The first memory device and the second memory device share the same channel to communicate with the controller. Communication between the first memory device and the controller and communication between the second memory device and the controller are mutually exclusive. When the controller receives a read request directed to the second memory device while the controller processes a direct memory access (DMA) operation directed to the first memory device, the controller suspends the DMA operation and transmits a read command associated with the read request to the second memory device.

公开(公告)号：US20190004984A1

公开(公告)日：2019-01-03

申请号：US15871637

申请日：2018-01-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHULSEUNG LEE ,  TAESUNG LEE ,  CHOONGEUI LEE ,  SOON SUK HWANG

IPC: G06F13/16 ,  G06F13/12 ,  G06K9/62 ,  G06F15/18

CPC classification number: G06F13/1689 ,  G06F13/126 ,  G06F13/1657 ,  G06K9/6255 ,  G06N20/00

Abstract: A data training method of a storage device, which includes a storage controller and a nonvolatile memory device, includes transmitting a read training command to the nonvolatile memory device, receiving a first training pattern output from the nonvolatile memory device in response to the read training command, receiving a second training pattern output from the nonvolatile memory device in response to the read training command, comparing the received first training pattern and the received second training pattern with a reference pattern, and determining a read timing offset of the storage controller depending on the comparison result.