公开(公告)号：US20240113163A1

公开(公告)日：2024-04-04

申请号：US18130732

申请日：2023-04-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： GEUNWOO KIM ,  WANDON KIM ,  HYUNWOO KANG ,  HYUNBAE LEE ,  JEONGHYUK YIM

IPC: H01L29/06 ,  H01L27/092 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L27/092 ,  H01L29/42392 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes; a substrate including an active pattern, a channel pattern and a source/drain pattern on the active pattern, wherein the channel pattern is connected to the source/drain pattern, a gate electrode on the channel pattern, and a gate contact connected to a top surface of the gate electrode, wherein the gate contact includes a capping layer directly contacting the top surface of the gate electrode and a metal layer on the capping layer, wherein the capping layer and the metal layer include the same metal, a concentration of oxygen in the metal layer ranges from between about 2 at % to about 10 at %, and a maximum concentration of oxygen in the capping layer ranges from between about 15 at % to about 30 at %.

公开(公告)号：US20240154017A1

公开(公告)日：2024-05-09

申请号：US18378992

申请日：2023-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNGHWAN KIM ,  WANDON KIM ,  JUNKI PARK ,  HYUNBAE LEE ,  HYOSEOK CHOI

IPC: H01L29/45 ,  H01L21/285 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78

CPC classification number: H01L29/45 ,  H01L21/28518 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/41733 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate including a first region and a second region. a first gate structure on the first region of the substrate, a first source/drain layer on a portion of the substrate adjacent to the first gate structure. a second gate structure on the second region of the substrate. a second source/drain layer on a portion of the substrate adjacent to the second gate structure. and a first contact plug including a first metal silicide pattern on the first source/drain layer. The first metal silicide pattern includes a silicide of a first metal and a silicide of a second metal different from the first metal. The device further includes a first conductive pattern on the first metal silicide pattern, a second contact plug including a second metal silicide pattern on the second source/drain layer, and a second conductive pattern on the second metal silicide pattern. The second metal silicide pattern includes a silicide of the first and second metals. A first ratio of the first metal to the second metal included in the first metal silicide pattern is different from a second ratio of the first metal to the second metal included in the second metal silicide pattern.

公开(公告)号：US20220208673A1

公开(公告)日：2022-06-30

申请号：US17344670

申请日：2021-06-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： EUI BOK LEE ,  RAKHWAN KIM ,  WANDON KIM ,  SEOWOO NAM ,  SUNYOUNG NOH ,  KI CHUL PARK ,  JONGCHAN SHIN ,  MINJOO LEE ,  HYUNBAE LEE ,  SEUNGSEOK HA

IPC: H01L23/522 ,  H01L29/417 ,  H01L29/78 ,  H01L27/088

Abstract: Disclosed is a semiconductor device including a substrate, a first interlayer dielectric layer on the substrate, a plurality of first vias in the first interlayer dielectric layer, a second interlayer dielectric layer on the first interlayer dielectric layer, and a first power line and a first lower line in the second interlayer dielectric layer that are electrically connected to respective ones of the first vias. A first width in a first direction of the first power line is greater than a second width in the first direction of the first lower line. The first power line includes a first metallic material. The first lower line includes a second metallic material. The first vias includes a third metallic material. The first, second, and third metallic materials are different from each other.