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公开(公告)号:US20240063276A1
公开(公告)日:2024-02-22
申请号:US18380754
申请日:2023-10-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Heon Bok LEE , Dae Yong KIM , Wan Don KIM , Jeong Hyuk YIM , Won Keun CHUNG , Hyo Seok CHOI , Sang Jin HYUN
IPC: H01L29/417 , H01L29/66 , H01L29/08 , H01L21/768 , H01L29/78
CPC classification number: H01L29/41775 , H01L29/6681 , H01L29/0847 , H01L21/76897 , H01L29/41791 , H01L29/7851
Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction, a gate electrode on the active pattern, the gate electrode extending in a second direction intersecting the first direction and including a first portion and a second portion arranged along the second direction, a first contact plug on the gate electrode, the first contact plug being connected to a top surface of the second portion of the gate electrode, a source/drain region in the active pattern on a sidewall of the gate electrode, and a source/drain contact on the source/drain region, a height of a top surface of the source/drain contact being higher than a top surface of the first portion of the gate electrode and lower than the top surface of the second portion of the gate electrode.
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公开(公告)号:US20220199790A1
公开(公告)日:2022-06-23
申请号:US17694759
申请日:2022-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Heon Bok LEE , Dae Yong KIM , Wan Don Kim , Jeong Hyuk YIM , Won Keun CHUNG , Hyo Seok CHOI , Sang Jin HYUN
IPC: H01L29/417 , H01L29/66 , H01L29/08 , H01L21/768 , H01L29/78
Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction, a gate electrode on the active pattern, the gate electrode extending in a second direction intersecting the first direction and including a first portion and a second portion arranged along the second direction, a first contact plug on the gate electrode, the first contact plug being connected to a top surface of the second portion of the gate electrode, a source/drain region in the active pattern on a sidewall of the gate electrode, and a source/drain contact on the source/drain region, a height of a top surface of the source/drain contact being higher than a top surface of the first portion of the gate electrode and lower than the top surface of the second portion of the gate electrode.
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公开(公告)号:US20130168873A1
公开(公告)日:2013-07-04
申请号:US13729218
申请日:2012-12-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Heon Bok LEE , Ki Se KIM
IPC: H01L23/48 , H01L21/768
CPC classification number: H01L23/481 , H01L21/76897 , H01L23/4824 , H01L29/872 , H01L2924/0002 , H01L2924/00
Abstract: A power semiconductor device and a manufacturing method thereof, the power semiconductor device including a plurality of first electrodes and a plurality of second electrodes, a plurality of first via electrodes on a first insulating layer and contacting the plurality of first electrodes, a plurality of second via electrodes on the first insulating layer and contacting the plurality of second electrodes, a first electrode pad contacting the plurality of first via electrodes, a second electrode pad contacting the plurality of second via electrodes, a plurality of third via electrodes on a second insulating layer and contacting the first electrode pad, a plurality of fourth via electrodes on the second insulating layer and contacting the second electrode pad, a third electrode pad contacting the plurality of third via electrodes, and a fourth electrode pad contacting the plurality of fourth via electrodes.
Abstract translation: 一种功率半导体器件及其制造方法,所述功率半导体器件包括多个第一电极和多个第二电极,多个第一通孔电极在第一绝缘层上并与所述多个第一电极接触,多个第二电极 通过所述第一绝缘层上的电极并接触所述多个第二电极,接触所述多个第一通孔电极的第一电极焊盘,与所述多个第二通孔电极接触的第二电极焊盘,在第二绝缘层上的多个第三通孔电极 以及使所述第一电极焊盘,所述第二绝缘层上的多个第四通孔电极和所述第二电极焊盘接触,与所述多个第三通孔电极接触的第三电极焊盘以及与所述多个第四通孔电极接触的第四电极焊盘。
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