公开(公告)号：US20230131945A1

公开(公告)日：2023-04-27

申请号：US18089148

申请日：2022-12-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heon Su JEONG ,  Hangi JUNG ,  Wangsoo KIM ,  Hae Young CHUNG

IPC: G06F13/16 ,  G06F13/40 ,  G11C7/22 ,  G11C7/10 ,  G11C8/18

Abstract: A memory device of a memory module includes a CA buffer that receives a command/address (CA) signal through a bus shared by a memory device different from the memory device of the memory module, and a calibration logic circuit that identifies location information of the memory device on the bus. The memory device recognizes its own location on a bus in a memory module to perform self-calibration, and thus, the memory device appropriately operates even under an operation condition varying depending on a location in the memory module.

公开(公告)号：US20240111695A1

公开(公告)日：2024-04-04

申请号：US18538263

申请日：2023-12-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heon Su JEONG ,  Hangi Jung ,  Wangsoo Kim ,  Hae Young Chung

IPC: G06F13/16 ,  G06F13/40 ,  G11C7/10 ,  G11C7/22 ,  G11C8/18

CPC classification number: G06F13/1673 ,  G06F13/4086 ,  G11C7/1048 ,  G11C7/1057 ,  G11C7/1084 ,  G11C7/1096 ,  G11C7/222 ,  G11C7/225 ,  G11C8/18 ,  G11C2207/2254

Abstract: A memory device of a memory module includes a CA buffer that receives a command/address (CA) signal through a bus shared by a memory device different from the memory device of the memory module, and a calibration logic circuit that identifies location information of the memory device on the bus. The memory device recognizes its own location on a bus in a memory module to perform self-calibration, and thus, the memory device appropriately operates even under an operation condition varying depending on a location in the memory module.

公开(公告)号：US20210141747A1

公开(公告)日：2021-05-13

申请号：US17008121

申请日：2020-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heon Su JEONG ,  Hangi JUNG ,  Wangsoo Kim ,  Hae Young CHUNG

IPC: G06F13/16 ,  G06F13/40 ,  G11C7/22 ,  G11C7/10 ,  G11C8/18

Abstract: A memory device of a memory module includes a CA buffer that receives a command/address (CA) signal through a bus shared by a memory device different from the memory device of the memory module, and a calibration logic circuit that identifies location information of the memory device on the bus. The memory device recognizes its own location on a bus in a memory module to perform self-calibration, and thus, the memory device appropriately operates even under an operation condition varying depending on a location in the memory module.