公开(公告)号：US12062626B2

公开(公告)日：2024-08-13

申请号：US18144902

申请日：2023-05-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwayoung Lee ,  Heejae Nam ,  Byungmoon Bae ,  Junggeun Shin ,  Hyunsu Sim ,  Junho Yoon ,  Dongjin Lee

IPC: H01L23/00 ,  H01L21/78 ,  H01L23/544

CPC classification number: H01L23/562 ,  H01L21/78 ,  H01L23/544 ,  H01L2223/5446

Abstract: A semiconductor substrate may include a plurality of semiconductor chips and a protection pattern. The semiconductor chips may be divided by two scribe lanes intersecting each other. Corners of the semiconductor chips may be disposed at the intersection of the two scribe lanes. The protection pattern may be arranged at the intersection of the scribe lanes to surround the corners of the semiconductor chips. Thus, the corners of the semiconductor chips may be protected by the protection pattern form colliding with each other in a following grinding process.

公开(公告)号：US20230275037A1

公开(公告)日：2023-08-31

申请号：US18144902

申请日：2023-05-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwayoung Lee ,  Heejae Nam ,  Byungmoon Bae ,  Junggeun Shin ,  Hyunsu Sim ,  Junho Yoon ,  Dongjin Lee

IPC: H01L23/00 ,  H01L23/544 ,  H01L21/78

CPC classification number: H01L23/562 ,  H01L23/544 ,  H01L21/78 ,  H01L2223/5446

Abstract: A semiconductor substrate may include a plurality of semiconductor chips and a protection pattern. The semiconductor chips may be divided by two scribe lanes intersecting each other. Corners of the semiconductor chips may be disposed at the intersection of the two scribe lanes. The protection pattern may be arranged at the intersection of the scribe lanes to surround the corners of the semiconductor chips. Thus, the corners of the semiconductor chips may be protected by the protection pattern form colliding with each other in a following grinding process.

公开(公告)号：US11676914B2

公开(公告)日：2023-06-13

申请号：US17216279

申请日：2021-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwayoung Lee ,  Heejae Nam ,  Byungmoon Bae ,  Junggeun Shin ,  Hyunsu Sim ,  Junho Yoon ,  Dongjin Lee

IPC: H01L23/544 ,  H01L23/00 ,  H01L21/78

CPC classification number: H01L23/562 ,  H01L21/78 ,  H01L23/544 ,  H01L2223/5446

Abstract: A semiconductor substrate may include a plurality of semiconductor chips and a protection pattern. The semiconductor chips may be divided by two scribe lanes intersecting each other. Corners of the semiconductor chips may be disposed at the intersection of the two scribe lanes. The protection pattern may be arranged at the intersection of the scribe lanes to surround the corners of the semiconductor chips. Thus, the corners of the semiconductor chips may be protected by the protection pattern form colliding with each other in a following grinding process.

公开(公告)号：US11322405B2

公开(公告)日：2022-05-03

申请号：US16909136

申请日：2020-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junho Yoon ,  Jungchul Lee ,  Byungmoon Bae ,  Junggeun Shin ,  Hyunsu Sim

IPC: G11B11/105 ,  B23K26/00 ,  B23K26/40 ,  H01L21/78 ,  H01L21/268 ,  H01L21/683 ,  H01L21/304

Abstract: According to an embodiment of inventive concepts, a substrate dicing method may include forming reformed patterns in a substrate using a laser beam, grinding a bottom surface of the substrate to thin the substrate, and expanding the substrate to divide the substrate into a plurality of semiconductor chips. The forming of the reformed patterns may include forming a first reformed pattern in the substrate and providing an edge focused beam to a region crossing the first reformed pattern to form a second reformed pattern in contact with the first reformed pattern.

公开(公告)号：US20220059472A1

公开(公告)日：2022-02-24

申请号：US17216279

申请日：2021-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwayoung Lee ,  Heejae Nam ,  Byungmoon Bae ,  Junggeun Shin ,  Hyunsu Sim ,  Junho Yoon ,  Dongjin Lee

IPC: H01L23/00 ,  H01L21/78 ,  H01L23/544

Abstract: A semiconductor substrate may include a plurality of semiconductor chips and a protection pattern. The semiconductor chips may be divided by two scribe lanes intersecting each other. Corners of the semiconductor chips may be disposed at the intersection of the two scribe lanes. The protection pattern may be arranged at the intersection of the scribe lanes to surround the corners of the semiconductor chips. Thus, the corners of the semiconductor chips may be protected by the protection pattern form colliding with each other in a following grinding process.

公开(公告)号：US11854892B2

公开(公告)日：2023-12-26

申请号：US17699570

申请日：2022-03-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junho Yoon ,  Jungchul Lee ,  Byungmoon Bae ,  Junggeun Shin ,  Hyunsu Sim

IPC: H01L21/78 ,  H01L21/268 ,  H01L21/683 ,  H01L21/304

CPC classification number: H01L21/78 ,  H01L21/268 ,  H01L21/304 ,  H01L21/6836 ,  H01L2221/68336

Abstract: According to an embodiment of inventive concepts, a substrate dicing method may include forming reformed patterns in a substrate using a laser beam, grinding a bottom surface of the substrate to thin the substrate, and expanding the substrate to divide the substrate into a plurality of semiconductor chips. The forming of the reformed patterns may include forming a first reformed pattern in the substrate and providing an edge focused beam to a region crossing the first reformed pattern to form a second reformed pattern in contact with the first reformed pattern.

公开(公告)号：US20230082384A1

公开(公告)日：2023-03-16

申请号：US17730993

申请日：2022-04-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junho Yoon ,  Yeongbeom Ko ,  Hwayoung Lee ,  Junggeun Shin ,  Hyunsu Sim ,  Kwangyong Lee ,  Jongho Lee

IPC: H01L21/67 ,  H01L21/683 ,  B23K26/53

Abstract: A substrate processing apparatus includes a chuck table including a mounting table having a mounting surface on which a substrate is mounted, wherein the mounting surface is a curved surface; and a laser supply head configured to irradiate the substrate attached to the mounting table with a laser beam.

公开(公告)号：US20220392851A1

公开(公告)日：2022-12-08

申请号：US17674549

申请日：2022-02-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hwayoung Lee ,  Hyunsu Sim ,  Junho Yoon

IPC: H01L23/00 ,  H01L21/304 ,  H01L21/78

Abstract: A method of manufacturing a semiconductor chip includes preparing a semiconductor substrate having an active surface on which a device layer is provided and an inactive surface opposite to the active surface, the device layer having a integrated circuit (IC) areas and a cut area provided between adjacent IC areas; forming anti-collision recesses in regions of the cut area that are adjacent to corners of the IC areas, each of the anti-collision recesses having rounded internal sidewalls, each of the rounded internal sidewalls corresponding to a respective corner of the adjacent corners; forming a modified portion in the semiconductor substrate by irradiating a cut line of the cut area with a laser; polishing the inactive surface of the semiconductor substrate, wherein cracks propagate from the modified portion in a vertical direction of the semiconductor substrate; and separating the IC areas from each other along the cracks to form semiconductor chips.