公开(公告)号：US20180331220A1

公开(公告)日：2018-11-15

申请号：US16028918

申请日：2018-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sug-Hyun Sung ,  Jung-gun YOU ,  Gi-gwan PARK ,  Ki-il KIM

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/762 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/06

CPC classification number: H01L29/7843 ,  H01L21/76224 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/7851 ,  H01L29/7854

Abstract: An integrated circuit device includes a fin-type active area protruding from a substrate; a plurality of liners sequentially covering lower side walls of the fin-type active area; a device isolation layer covering the lower side walls of the fin-type active area with the plurality of liners between the device isolation layer and the fin-type active area; and a gate insulating layer extending to cover a channel region of the fin-type active area, the plurality of liners, and the device isolation layer, and including protrusions located on portions of the gate insulating layer which cover the plurality of liners.

公开(公告)号：US20240224487A1

公开(公告)日：2024-07-04

申请号：US18604195

申请日：2024-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KI-IL KIM ,  Jung-gun YOU ,  Gi-gwan PARK

IPC: H10B10/00 ,  H01L21/8238 ,  H01L27/092 ,  H01L27/105 ,  H01L29/78

CPC classification number: H10B10/12 ,  H01L21/823821 ,  H01L27/0924 ,  H01L27/105 ,  H01L29/7851 ,  H01L29/7853 ,  H01L29/7854

Abstract: A semiconductor device can include a field insulating film on a substrate and a fin-type pattern of a particular material, on the substrate, having a first sidewall and an opposing second sidewall. The fin-type pattern can include a first portion of the fin-type pattern that protrudes from an upper surface of the field insulating film and a second portion of the fin-type pattern disposed on the first portion. A third portion of the fin-type pattern can be disposed on the second portion where the third portion can be capped by a top rounded surface of the fin-type pattern and the first sidewall can have an undulated profile that spans the first, second and third portions.

公开(公告)号：US20170256645A1

公开(公告)日：2017-09-07

申请号：US15446322

申请日：2017-03-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-yup CHUNG ,  Myung-yoon UM ,  Dong-ho CHA ,  Jung-gun YOU ,  Gi-gwan PARK

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/8238 ,  H01L29/16 ,  H01L29/161 ,  H01L27/092 ,  H01L29/08

CPC classification number: H01L29/7854 ,  H01L21/823431 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/66818 ,  H01L29/7843 ,  H01L29/7846

Abstract: An integrated circuit (IC) device includes a pair of fin-shaped active areas that are adjacent to each other with a fin separation area therebetween, the pair of fin-shaped active areas extend in a line, and a fin separation insulating structure in the fin separation area, wherein the pair of fin-shaped active areas includes a first fin-shaped active area having a first corner defining part of the fin separation area, and wherein the fin separation insulating structure includes a lower insulating pattern that covers sidewalls of the pair of fin-shaped active areas, and an upper insulating pattern on the lower insulating pattern to cover at least part of the first corner, the upper insulating pattern having a top surface at a level higher than a top surface of each of the pair of fin-shaped active areas.

公开(公告)号：US20200027986A1

公开(公告)日：2020-01-23

申请号：US16587227

申请日：2019-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sug-Hyun Sung ,  Jung-gun YOU ,  Gi-gwan PARK ,  Ki-il KIM

IPC: H01L29/78 ,  H01L29/06 ,  H01L27/092 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8238

Abstract: An integrated circuit device includes a fin-type active area protruding from a substrate; a plurality of liners sequentially covering lower side walls of the fin-type active area; a device isolation layer covering the lower side walls of the fin-type active area with the plurality of liners between the device isolation layer and the fin-type active area; and a gate insulating layer extending to cover a channel region of the fin-type active area, the plurality of liners, and the device isolation layer, and including protrusions located on portions of the gate insulating layer which cover the plurality of liners.

公开(公告)号：US20190035934A1

公开(公告)日：2019-01-31

申请号：US16150795

申请日：2018-10-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-yup CHUNG ,  Myung-yoon UM ,  Dong-ho CHA ,  Jung-gun YOU ,  Gi-gwan PARK

IPC: H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/161 ,  H01L29/16 ,  H01L29/08 ,  H01L29/06 ,  H01L27/12 ,  H01L27/092 ,  H01L27/088 ,  H01L21/84 ,  H01L21/8238

CPC classification number: H01L29/7854 ,  H01L21/823431 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/66818 ,  H01L29/7843 ,  H01L29/7846

Abstract: An integrated circuit (IC) device includes a pair of fin-shaped active areas that are adjacent to each other with a fin separation area therebetween, the pair of fin-shaped active areas extend in a line, and a fin separation insulating structure in the fin separation area, wherein the pair of fin-shaped active areas includes a first fin-shaped active area having a first corner defining part of the fin separation area, and wherein the fin separation insulating structure includes a lower insulating pattern that covers sidewalls of the pair of fin-shaped active areas, and an upper insulating pattern on the lower insulating pattern to cover at least part of the first corner, the upper insulating pattern having a top surface at a level higher than a top surface of each of the pair of fin-shaped active areas.

公开(公告)号：US20170062613A1

公开(公告)日：2017-03-02

申请号：US15223332

申请日：2016-07-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sug-hyun Sung ,  Jung-gun YOU ,  Gi-gwan PARK ,  Ki-il KIM

IPC: H01L29/78 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/762 ,  H01L29/06 ,  H01L27/092

CPC classification number: H01L29/7843 ,  H01L21/76224 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/7851 ,  H01L29/7854

Abstract: An integrated circuit device includes a fin-type active area protruding from a substrate; a plurality of liners sequentially covering lower side walls of the fin-type active area; a device isolation layer covering the lower side walls of the fin-type active area with the plurality of liners between the device isolation layer and the fin-type active area; and a gate insulating layer extending to cover a channel region of the fin-type active area, the plurality of liners, and the device isolation layer, and including protrusions located on portions of the gate insulating layer which cover the plurality of liners.

Abstract translation: 集成电路器件包括从衬底突出的鳍式有源区; 多个衬垫，其顺序地覆盖所述翅片型有源区的下侧壁; 所述器件隔离层覆盖所述翅片型有源区的下侧壁，所述多个衬垫位于所述器件隔离层和所述翅片型有源区之间; 以及栅极绝缘层，其延伸以覆盖鳍状有源区域的沟道区域，多个衬垫和器件隔离层，并且包括位于覆盖多个衬垫的栅极绝缘层的部分上的突起。