公开(公告)号：US11894079B2

公开(公告)日：2024-02-06

申请号：US17384219

申请日：2021-07-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyeji Lee ,  Raeyoung Lee ,  Jinkyu Kang ,  Sejun Park ,  Jaeduk Lee

IPC: G11C16/34 ,  G11C16/26 ,  G11C16/10

CPC classification number: G11C16/3463 ,  G11C16/102 ,  G11C16/26 ,  G11C16/3404

Abstract: A memory controller includes an over-program controller that preprograms and then erases the memory cells such that each of the memory cells has a first threshold voltage level, wherein fast cells are detected among the memory cells according to a threshold voltage less than or equal to a second threshold voltage less than the first threshold voltage, and a processor that generates fast cell information identifying the fast cells among the memory cells and stores the fast cell information in a buffer. The over-program controller controls the over-programming of the fast cells and normal programming of normal cells among the memory cells based on the fast cell information stored in the buffer.

公开(公告)号：US10726931B2

公开(公告)日：2020-07-28

申请号：US16023706

申请日：2018-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Raeyoung Lee ,  Hyunjung Kim ,  Sung-Bok Lee ,  Soyeong Gwak ,  Sang-wan Nam

IPC: G11C16/34 ,  G06F3/06 ,  G11C16/04 ,  G11C16/14 ,  G11C16/10 ,  G06F11/10 ,  G11C11/56 ,  G11C29/52 ,  H01L27/11568 ,  G11C29/04

Abstract: A method of operating a memory controller, the memory controller configured to control a nonvolatile memory device, the nonvolatile memory device including a plurality of memory blocks. The method including detecting an invalid block among the plurality of memory blocks; determining an invalid pattern based on a state of the invalid block; and performing an operation on the invalid block such that the invalid block has the invalid pattern.

公开(公告)号：US11966625B2

公开(公告)日：2024-04-23

申请号：US17722850

申请日：2022-04-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Guyeon Han ,  Sangwon Park ,  Jinkyu Kang ,  Raeyoung Lee ,  Jaeduk Lee

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: Provided are a memory device storing setting data and a memory system including the same. The memory device may include a cell array including a plurality of cell blocks, each including a plurality of pages, and a control logic that controls a program and read operation on the cell array, wherein at least one page of the cell array stores information data read (IDR) data including information related to a setting operation of the memory device, at least one other page of the cell array stores replica IDR data including inverted bit values of the IDR data, and the control logic controls a recovery operation for repairing errors in the IDR data by reading the replica IDR data when a read fail of the IDR data occurs.

公开(公告)号：US11699490B2

公开(公告)日：2023-07-11

申请号：US17220218

申请日：2021-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soyeong Gwak ,  Raeyoung Lee ,  Jinkyu Kang ,  Sejun Park ,  Changhwan Shin ,  Jaeduk Lee ,  Woojae Jang

IPC: G11C16/34 ,  G11C16/16 ,  G11C16/26 ,  G11C7/10 ,  G11C16/24 ,  G11C16/08

CPC classification number: G11C16/16 ,  G11C7/106 ,  G11C7/1087 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/349

Abstract: An operating method of a storage device includes reading a wear-out pattern of a memory block when a controller determines the memory block is a re-use memory block of a non-volatile memory device; selecting an operation mode corresponding to the read wear-out pattern using the controller; and transmitting the selected operation mode to the non-volatile memory device using the controller.