公开(公告)号：US09560783B2

公开(公告)日：2017-01-31

申请号：US14622090

申请日：2015-02-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Seuk Kang ,  Hyo-Geun Ahn ,  Sang-Won Lee ,  Jong-Chul Choi

IPC: H05K9/00 ,  H05K5/06 ,  G06F1/16 ,  H04M1/02 ,  H04M1/18 ,  A45C11/00 ,  H05K5/00 ,  H05K5/02 ,  H05K5/03 ,  H04M1/725

CPC classification number: H05K5/061 ,  A45C11/00 ,  G06F1/1635 ,  G06F1/1656 ,  H04M1/0252 ,  H04M1/0262 ,  H04M1/18 ,  H04M1/72575 ,  H04M2250/04 ,  H05K5/0013 ,  H05K5/0086 ,  H05K5/0247 ,  H05K5/03

Abstract: An electronic device is provided. The electronic device includes a body configured to house the electronic device and including a space for accommodating a battery on one surface of the body and a cover configured to cover at least the space and being detachably attached to the body. The cover includes a first sealing member located between the one surface of the body and an inner surface of the cover and formed to surround the space.

Abstract translation: 提供电子设备。 电子设备包括：主体，其构造成容纳电子设备，并且包括用于在主体的一个表面上容纳电池的空间;以及盖，其被构造成至少覆盖空间并且可拆卸地附接到主体。 所述盖包括位于所述主体的一个表面和所述盖的内表面之间并形成为围绕所述空间的第一密封构件。

公开(公告)号：US12051680B2

公开(公告)日：2024-07-30

申请号：US17735158

申请日：2022-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae Hwan Kim ,  Hyung Gil Baek ,  Young-Ja Kim ,  Kang Gyune Lee ,  Sang-Won Lee ,  Yong Kwan Lee

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L25/162 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/165 ,  H01L23/49816 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/165 ,  H01L2924/1659 ,  H01L2924/182

Abstract: A semiconductor package may include; a first substrate, a first semiconductor chip disposed on the first substrate, an interposer disposed on the first semiconductor chip, a connecter spaced apart from the first semiconductor chip in a first horizontal direction and extending between the first substrate and the interposer, wherein the connecter directly electrically connects the first substrate and the interposer, a capacitor disposed between the connecter and the first semiconductor chip, and a guide pattern including a first guide portion and an opposing second guide portion spaced apart in the first horizontal direction, wherein the first guide portion is disposed between the connecter and the capacitor, the second guide portion is disposed between the capacitor and the first semiconductor chip, and at least part of the capacitor is inserted between the first guide portion and the second guide portion.

公开(公告)号：US11728319B2

公开(公告)日：2023-08-15

申请号：US17198763

申请日：2021-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Won Lee

IPC: H01L23/48 ,  H01L23/52 ,  H01L25/10 ,  H01L23/31 ,  H01L21/56 ,  H01L25/18 ,  H01L23/00 ,  H01L23/29

CPC classification number: H01L25/105 ,  H01L21/561 ,  H01L23/3128 ,  H01L25/18 ,  H01L23/295 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/19041 ,  H01L2924/19106

Abstract: A semiconductor package includes a first sub-semiconductor package, an interposer substrate, and a second sub-semiconductor package that are sequentially stacked. The first sub-semiconductor package includes a first package substrate, a first semiconductor device, and a first mold member that are sequentially stacked, and the interposer substrate includes at least one hole. The first mold member includes: a mold main portion which covers the first semiconductor device; a mold connecting portion extended from the mold main portion and inserted into the at least one hole; and a mold protruding portion extended from the mold connecting portion to cover a top surface of the interposer substrate outside the at least one hole. The mold main portion, the mold connecting portion, and the mold protruding portion constitute a single object.