公开(公告)号：US20140049541A1

公开(公告)日：2014-02-20

申请号：US14062252

申请日：2013-10-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-moo PARK ,  Yong-tae KIM ,  Seon-deok HWANG ,  Dae-sik KIM

IPC: G06T15/00

CPC classification number: G06T15/00 ,  H04N13/139 ,  H04N13/359 ,  H04N2213/007

Abstract: Provided are a method and apparatus for displaying a two-dimensional (2D)/three-dimensional (3D) image, and apparatus to execute the same, the method including determining whether an input image sequence having a first frame rate is a 2D image sequence or a 3D image sequence, wherein, if the input image sequence is a 2D image sequence, generating a 2D output image sequence having a second frame rate, the 2D output image sequence including the input image sequence and a 2D intermediate image generated from the input image sequence, and wherein, if the input image sequence is a 3D image sequence, generating a 3D output image sequence having a third frame rate, where a left-viewpoint intermediate image, a right-viewpoint intermediate image and the input image sequence are repeatedly included in the 3D output image sequence, the left-viewpoint intermediate image is determined from at least one left-viewpoint image in a left-viewpoint image sequence included in the input image sequence, and the right-viewpoint intermediate image is determined from at least one right-viewpoint image in a right-viewpoint image sequence included in the input image sequence.

Abstract translation: 提供了一种用于显示二维（2D）/三维（3D）图像的方法和装置及其执行方法，所述方法包括确定具有第一帧速率的输入图像序列是否为2D图像序列 或3D图像序列，其中如果所述输入图像序列是2D图像序列，则生成具有第二帧率的2D输出图像序列，所述2D输出图像序列包括所述输入图像序列和从所述输入生成的2D中间图像 图像序列，并且其中，如果所述输入图像序列是3D图像序列，则生成具有第三帧率的3D输出图像序列，其中左视点中间图像，右视点中间图像和所述输入图像序列重复 包括在3D输出图像序列中，从包括在输入图像序列中的左视点图像序列中的至少一个左视点图像确定左视点中间图像，以及 从包括在输入图像序列中的右视点图像序列中的至少一个右视点图像确定右视点中间图像。

公开(公告)号：US20190259642A1

公开(公告)日：2019-08-22

申请号：US16401880

申请日：2019-05-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-moo PARK

IPC: H01L21/67 ,  H01L23/00 ,  H01L33/00

Abstract: A process system includes a substrate, first wafers, second wafers, and a roller. The first wafers are arranged at predetermined intervals along a first column which is parallel to an edge of the substrate, wherein each of the first wafers includes first chips. The second wafers are arranged at the predetermined intervals and at an offset from the first wafers, along a second column which is parallel to the first column, wherein each of the second wafers includes second chips. The roller is configured to roll in a first direction to pick up the plurality of first chips, roll in a second direction opposite to the first direction while suspended from the first wafers, pick up the second chips included in the wafers by rolling in the first direction, and transport the first chips and the second chips to the substrate.

公开(公告)号：US20170309502A1

公开(公告)日：2017-10-26

申请号：US15258572

申请日：2016-09-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-moo PARK

IPC: H01L21/67 ,  B65G47/90 ,  H01L21/677 ,  H01L21/687

CPC classification number: H01L21/67132 ,  H01L21/67144 ,  H01L24/95 ,  H01L25/0753 ,  H01L2924/14

Abstract: A process system includes a substrate, first wafers, second wafers, and a roller. The first wafers are arranged at predetermined intervals along a first column which is parallel to an edge of the substrate, wherein each of the first wafers includes first chips. The second wafers are arranged at the predetermined intervals and at an offset from the first wafers, along a second column which is parallel to the first column, wherein each of the second wafers includes second chips. The roller is configured to roll in a first direction to pick up the plurality of first chips, roll in a second direction opposite to the first direction while suspended from the first wafers, pick up the second chips included in the wafers by rolling in the first direction, and transport the first chips and the second chips to the substrate.

公开(公告)号：US20170309222A1

公开(公告)日：2017-10-26

申请号：US15265272

申请日：2016-09-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-hoon JUNG ,  Young-mok PARK ,  Sang-moo PARK ,  Seong-woo CHO

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G3/3216 ,  G09G2300/0426 ,  G09G2310/0264 ,  G09G2310/0278 ,  G09G2310/06 ,  G09G2330/021

Abstract: An LED display module, a display apparatus, and a method for controlling the LED display module and the display apparatus are provided. The LED display module includes a plurality of first LEDs arranged in a first line and a plurality of second LEDs arranged in a second line; a plurality of source interfaces, each of which is commonly connected to an anode of a corresponding one of the plurality of first LEDs and a cathode of a corresponding one of the plurality of second LEDs arranged in the same column as the corresponding one of the plurality of first LEDs; and a gate interface commonly connected to a cathode of each of the plurality of the first LEDs and an anode of each of the plurality of the second LEDs.