公开(公告)号：US09704545B2

公开(公告)日：2017-07-11

申请号：US15175550

申请日：2016-06-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seong-Heon Yu ,  Jonghyun Choi ,  Dongwoo Sohn ,  Ki-Seok Oh

IPC: G11C7/12 ,  G11C7/06 ,  G11C5/14

CPC classification number: G11C7/12 ,  G11C5/141 ,  G11C5/145 ,  G11C7/062 ,  G11C7/065 ,  G11C7/08 ,  G11C11/4074 ,  G11C11/4091 ,  G11C11/4094

Abstract: A semiconductor memory device includes a plurality of memory cells, a plurality of word lines and a plurality of bit lines, wherein each memory cell is coupled to a respective word line and bit line. The semiconductor memory device includes a plurality of sense amplifiers, wherein each sense amplifier is coupled to two bit lines. The semiconductor memory device is configured to receive a first positive supply voltage, a second positive supply voltage, and a negative supply voltage, and determine a low level of an amplified voltage based on the negative supply voltage in an operation of amplifying data in a memory cell.

公开(公告)号：US10770154B2

公开(公告)日：2020-09-08

申请号：US16294058

申请日：2019-03-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Heon Yu ,  Joung Yeal Kim ,  Chul Ung Kim ,  Hyun Bo Kim ,  Joo Youn Lim

IPC: G11C11/406 ,  G11C5/14 ,  G11C16/34 ,  G11C16/08 ,  G11C16/16 ,  G11C16/20

Abstract: Provided are a semiconductor memory device and a memory system including the same. The semiconductor memory device includes a power-up signal generator configured to generate a power-up signal in response to a memory voltage reaching a target voltage level, an initializer configured to generate an initialization signal in response to the power-up signal and a reset signal and to generate an initial refresh command in response to completion of an initialization operation, and a memory cell array including a plurality of memory cells connected between a plurality of word lines and a plurality of bit lines, the memory cell array configured to perform an initial refresh operation on the plurality of memory cells in response to the initial refresh command.

公开(公告)号：US10990281B2

公开(公告)日：2021-04-27

申请号：US16003756

申请日：2018-06-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seong-Heon Yu ,  Joungyeal Kim ,  Miyoung Woo

IPC: G06F1/32 ,  G06F9/44 ,  G06F13/24 ,  G11C7/10 ,  G11C11/406 ,  G06F3/06

Abstract: A random-access memory (RAM) controller is connected with multiple memories. The random-access memory controller selectively boots at least one memory of the multiple memories based on booting-related information about the multiple memories.

公开(公告)号：US20200082889A1

公开(公告)日：2020-03-12

申请号：US16294058

申请日：2019-03-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Heon Yu ,  Joung Yeal Kim ,  Chul Ung Kim ,  Hyun Bo Kim ,  Joo Youn Lim

IPC: G11C16/34 ,  G11C16/20 ,  G11C16/16 ,  G11C16/08

Abstract: Provided are a semiconductor memory device and a memory system including the same. The semiconductor memory device includes a power-up signal generator configured to generate a power-up signal in response to a memory voltage reaching a target voltage level, an initializer configured to generate an initialization signal in response to the power-up signal and a reset signal and to generate an initial refresh command in response to completion of an initialization operation, and a memory cell array including a plurality of memory cells connected between a plurality of word lines and a plurality of bit lines, the memory cell array configured to perform an initial refresh operation on the plurality of memory cells in response to the initial refresh command.