公开(公告)号：US20190081160A1

公开(公告)日：2019-03-14

申请号：US15956166

申请日：2018-04-18

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Dong Chan SUH ,  Sangmoon LEE ,  Yihwan KIM ,  Woo Bin SONG ,  Dongsuk SHIN ,  Seung Ryul LEE

IPC分类号： H01L29/66 ,  H01L21/28

摘要： A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.

公开(公告)号：US20170186609A1

公开(公告)日：2017-06-29

申请号：US15363139

申请日：2016-11-29

申请人： Samsung Electronics Co., Ltd.

发明人： Ji Eon YOON ,  Chul KIM ,  Sang Moon LEE ,  Seung Ryul LEE

IPC分类号： H01L21/02 ,  H01L29/32

CPC分类号： H01L21/02639 ,  H01L21/02381 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02598 ,  H01L21/02642 ,  H01L21/02647 ,  H01L21/0265 ,  H01L29/32

摘要： A semiconductor single crystal structure may include a substrate; a defect trapping stack disposed on the substrate; and a semiconductor single crystal disposed on the defect trapping stack, and having a lattice mismatch with a crystal of the substrate, in which the defect trapping stack may include a first dielectric layer disposed on the substrate, and having at least one first opening, a second dielectric layer disposed on the first dielectric layer, and having at least one second opening, a third dielectric layer disposed on the second dielectric layer, and having at least one third opening, and a fourth dielectric layer disposed on the third dielectric layer, and having at least one fourth opening, and in which the semiconductor single crystal may extend to a region of the substrate defined in the at least one first opening through the at least one first to fourth opening.

公开(公告)号：US20200303523A1

公开(公告)日：2020-09-24

申请号：US16889899

申请日：2020-06-02

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Dong Chan SUH ,  Sangmoon LEE ,  Yihwan KIM ,  Woo Bin SONG ,  Dongsuk SHIN ,  Seung Ryul LEE

IPC分类号： H01L29/66 ,  H01L21/28 ,  H01L29/786 ,  H01L29/423

摘要： A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.

公开(公告)号：US20190067285A1

公开(公告)日：2019-02-28

申请号：US15939914

申请日：2018-03-29

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Sangmoon LEE ,  Jungtaek KIM ,  Yihwan KIM ,  Woo Bin SONG ,  Dongsuk SHIN ,  Seung Ryul LEE

IPC分类号： H01L27/092 ,  H01L21/84 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78

摘要： A semiconductor device and a method of fabricating a semiconductor device, the device including a substrate; an active pattern spaced apart from the substrate and extending in a first direction; and a gate structure on the active pattern and extending in a second direction crossing the first direction, wherein a lower portion of the active pattern extends in the first direction and includes a first lower surface that is sloped with respect to an upper surface of the substrate.

公开(公告)号：US20170373062A1

公开(公告)日：2017-12-28

申请号：US15494769

申请日：2017-04-24

申请人： Samsung Electronics Co., Ltd.

发明人： Moon Seung Yang ,  Dong Chan SUH ,  Chul KIM ,  Woo Bin SONG ,  Ji Eon YOON ,  Seung Ryul LEE

IPC分类号： H01L27/092 ,  H01L29/06 ,  H01L29/10 ,  H01L29/78

摘要： The semiconductor device includes a first multi-channel active pattern protruding from a substrate, and having a first height, a second multi-channel active pattern on the substrate, being spaced apart from the substrate, and having a second height that is less than the first height, and a gate electrode on the substrate, intersecting the first multi-channel active pattern and the second multi-channel active pattern.