公开(公告)号：US20190069089A1

公开(公告)日：2019-02-28

申请号：US16102150

申请日：2018-08-13

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Dong Hyun JUNG ,  Sang Chul KO ,  Dong-Kyu PARK ,  Sang Moon LEE ,  Byeong Geun CHEON ,  Hae Kwang PARK ,  Young Tae KIM

IPC分类号： H04R5/02 ,  H04R1/02 ,  H04R3/12

摘要： A sound output apparatus, a display apparatus and a method for controlling the same are provided. The sound output apparatus includes a housing; and at least one speaker provided on a side of the housing, wherein the housing includes an accommodation portion provided with an insertion groove to which the at least one speaker is inserted and mounted, wherein the at least one speaker includes a sound generator configured to generate a sound; and a guide tube that has a cross sectional area that changes from a first end of the guide tube to a second end of the guide tube, and wherein the guide tube receives the generated sound via the first end, and the guide tube includes an outer surface having a plurality of radiation apertures arranged in at least one row.

公开(公告)号：US20220231168A1

公开(公告)日：2022-07-21

申请号：US17657761

申请日：2022-04-04

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Hyo Jin KIM ,  Dong Woo KIM ,  Sang Moon LEE ,  Seung Hun LEE

IPC分类号： H01L29/78 ,  H01L21/768 ,  H01L21/8238 ,  H01L29/786 ,  H01L27/092

摘要： A semiconductor device includes first and second fin-shaped patterns disposed on a substrate and extending in a first direction, first and second channel layers disposed on the first and second fin-shaped patterns, first and second etch stop layers disposed inside the first and second channel layers, first and second gate structures extending in a second direction different from the first direction on the first channel layer with a first recess formed therebetween, third and fourth gate structures extending in the second direction on the second channel layer with a second recess formed therebetween, the first recess having a first width in the first direction and having a first depth in a third direction perpendicular to the first and second directions, the second recess having a second width different from the first width in the first direction, and having a second depth equal to the first depth in the third direction.

公开(公告)号：US20240006409A1

公开(公告)日：2024-01-04

申请号：US18138825

申请日：2023-04-25

申请人： Samsung Electronics Co., Ltd.

发明人： Dong Woo KIM ,  Jin Bum KIM ,  Sang Moon LEE

IPC分类号： H01L27/088 ,  H01L21/8234

CPC分类号： H01L27/088 ,  H01L21/8234

摘要： There is provided a semiconductor device including an active pattern which includes a lower pattern extending in a first direction and a plurality of sheet patterns spaced apart from the lower pattern in a second direction on a substrate, the lower pattern including a protruding pattern protruding from the substrate in the second direction, and a capping pattern being in contact with the protruding pattern on the protruding pattern, a first gate structure and a second gate structure which are disposed on the lower pattern and spaced apart from each other in the first direction, and a source/drain pattern which is disposed on the lower pattern and in contact with the sheet pattern, wherein a thickness of the capping pattern in a portion that overlaps the first gate structure is different from a thickness of the capping pattern in a portion that overlaps the second gate structure.

公开(公告)号：US20230317849A1

公开(公告)日：2023-10-05

申请号：US17961818

申请日：2022-10-07

申请人： Samsung Electronics Co., Ltd.

发明人： Jin Bum KIM ,  Hyo Jin KIM ,  Yong Jun NAM ,  Sang Moon LEE ,  Dong Woo KIM ,  In Geon HWANG

IPC分类号： H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

CPC分类号： H01L29/7851 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/66545

摘要： A semiconductor device includes a lower pattern extending in a first direction, and protruding from a substrate in a second direction, a lower insulating pattern on the lower pattern, and in contact with an upper surface of the lower pattern, a channel pattern on the lower insulating pattern, a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction, wherein each of the plurality of gate structures includes a gate electrode and a gate insulating film, and a source/drain pattern disposed on the lower pattern, and connected to the channel pattern. A vertical level of a lowermost portion of the source/drain pattern is lower than a vertical level of a bottom surface of the lower insulating pattern. The gate electrode overlaps the lower insulating pattern in the second direction.

公开(公告)号：US20170186609A1

公开(公告)日：2017-06-29

申请号：US15363139

申请日：2016-11-29

申请人： Samsung Electronics Co., Ltd.

发明人： Ji Eon YOON ,  Chul KIM ,  Sang Moon LEE ,  Seung Ryul LEE

IPC分类号： H01L21/02 ,  H01L29/32

CPC分类号： H01L21/02639 ,  H01L21/02381 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02598 ,  H01L21/02642 ,  H01L21/02647 ,  H01L21/0265 ,  H01L29/32

摘要： A semiconductor single crystal structure may include a substrate; a defect trapping stack disposed on the substrate; and a semiconductor single crystal disposed on the defect trapping stack, and having a lattice mismatch with a crystal of the substrate, in which the defect trapping stack may include a first dielectric layer disposed on the substrate, and having at least one first opening, a second dielectric layer disposed on the first dielectric layer, and having at least one second opening, a third dielectric layer disposed on the second dielectric layer, and having at least one third opening, and a fourth dielectric layer disposed on the third dielectric layer, and having at least one fourth opening, and in which the semiconductor single crystal may extend to a region of the substrate defined in the at least one first opening through the at least one first to fourth opening.