公开(公告)号：US20240088015A1

公开(公告)日：2024-03-14

申请号：US18462049

申请日：2023-09-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeewoong KIM ,  Hojun KIM ,  Sungmoon LEE ,  Seungmin CHA

IPC: H01L23/522 ,  H01L23/528 ,  H01L23/58

CPC classification number: H01L23/5223 ,  H01L23/5286 ,  H01L23/585

Abstract: An integrated circuit device comprising: a dielectric layer; a first power delivery network layer on a first surface of the dielectric layer; a second power delivery network layer on a second surface of the dielectric layer, wherein the second surface is opposite to the first surface in a vertical direction; and a via capacitor between the first surface and the second surface of the dielectric layer, wherein the via capacitor includes a first via electrode structure and a second via electrode structure that are spaced apart from each other in one of a first horizontal direction and a second horizontal direction that intersects with the first horizontal direction, and a first end portion and a second end portion that is opposite to the first end portion of the via capacitor are electrically connected to the first power delivery network layer and the second power delivery network layer, respectively.

公开(公告)号：US20250142945A1

公开(公告)日：2025-05-01

申请号：US18634355

申请日：2024-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sora YOU ,  Dongyun LEE ,  Seungmin CHA ,  Jeewoong KIM

IPC: H01L27/06 ,  H01L23/528 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/861

Abstract: A semiconductor device may include a diode pattern including a first conductive region and a second conductive region having opposite conductivity types to each other on a base insulating layer, an insulating layer covering the diode pattern on the base insulating layer, a wiring portion on the insulating layer; and a through connector extending through the insulating layer at a periphery of the diode pattern to electrically connect the diode pattern and the wiring portion.

公开(公告)号：US20240332358A1

公开(公告)日：2024-10-03

申请号：US18380711

申请日：2023-10-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungmin CHA ,  Jinkyu KIM ,  Yunsuk NAM

IPC: H01L29/06 ,  H01L23/48 ,  H01L27/092 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L23/481 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes: a first substrate that includes a first region and a second region; an active pattern disposed on the first region; a source/drain pattern disposed on the active pattern; a through contact disposed on the second region; a first metal layer disposed on the through contact; a second substrate disposed on the first metal layer, wherein the second substrate includes an impurity region; a lower bonding pad disposed between the first metal layer and the second substrate; an upper bonding pad disposed on the lower bonding pad; and a power delivery network layer disposed on a bottom surface of the first substrate, wherein the lower bonding pad and the upper bonding pad are in contact with each other, wherein the through contact is connected to the lower bonding pad, and wherein the impurity region is connected to the upper bonding pad.