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公开(公告)号:US20170317079A1
公开(公告)日:2017-11-02
申请号:US15413466
申请日:2017-01-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: YOONJAE KIM , CHEOL KIM , YONG-HOON SON , JIN-HYUK YOO , WOOJIN JUNG
IPC: H01L27/088 , H01L21/306 , H01L29/66 , H01L29/423 , H01L29/165 , H01L29/10 , H01L29/08 , H01L29/06 , H01L27/02 , H01L21/8234 , H01L21/311 , H01L29/78
Abstract: A semiconductor device includes a substrate having an active pattern, a conductive pattern crossing the active pattern, a spacer structure on at least one side surface of the conductive pattern, and a capping structure on the conductive pattern. The capping structure includes a first capping pattern and a second capping pattern. The second capping pattern is disposed on a top surface of the first capping pattern and a top surface of the spacer structure.
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公开(公告)号:US20220070992A1
公开(公告)日:2022-03-03
申请号:US17242022
申请日:2021-04-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: SUNGHO JANG , YOONJAE KIM , HYUCK SHIN , DONGHYUB LEE , KUL INN
Abstract: A method of manufacturing a semiconductor includes generating plasma in an amplifying tube using gas as a gain medium; detecting a state of the plasma generated in the amplifying tube; determining a virtual laser gain based on the detected state of the plasma; controlling the state of the plasma such that the virtual laser gain is within a target range; and manufacturing the semiconductor device including performing an exposure process on a substrate using a laser beam output from the amplifying tube adjusted to have the virtual laser gain within the target range.
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公开(公告)号:US20200119009A1
公开(公告)日:2020-04-16
申请号:US16716384
申请日:2019-12-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: YOONJAE KIM , CHEOL KIM , YONG-HOON SON , JIN-HYUK YOO , WOOJIN JUNG
IPC: H01L27/088 , H01L29/78 , H01L29/66 , H01L29/423 , H01L29/10 , H01L29/08 , H01L29/06 , H01L27/02 , H01L21/8234 , H01L21/311 , H01L21/306 , H01L21/768 , H01L23/485
Abstract: A semiconductor device includes a substrate having an active pattern, a conductive pattern crossing the active pattern, a spacer structure on at least one side surface of the conductive pattern, and a capping structure on the conductive pattern. The capping structure includes a first capping pattern and a second capping pattern. The second capping pattern is disposed on a top surface of the first capping pattern and a top surface of the spacer structure.
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