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公开(公告)号：US11048379B2
公开(公告)日：2021-06-29
申请号：US15666803
申请日：2017-08-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yu-Sun Cheong , Byung-Jin Kang , Yong-Jin Kwon , Gae-Youn Kim , Dae-Myung Kim , Kwon-Ho Song , Dong-Oh Lee , Suk-Jae Lee , Kwang-Hyun Cho , Byeng-Seok Choi , Ju-Yeong Lee , Hyun-Ju Hong
IPC: G06F3/0482 , H04W4/029 , G06F3/0484 , G06F1/16 , G06F3/0488 , H04M1/02 , H04W4/02
Abstract: An electronic device including a flexible display and a method thereof are disclosed herein. The electronic device may include the flexible display and a processor. The processor implements the method, including controlling the flexible display to divide a display area into a first area and a second area, controlling the flexible display to display a first graphic element related to a first application in the first area, and a second graphic element related to controlling the first application in the second area, and controlling the first application responsive to detecting an input to the second graphic element.
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公开(公告)号：US10534534B2
公开(公告)日：2020-01-14
申请号：US15667081
申请日：2017-08-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yu-Sun Cheong , Byung Jin Kang , Yong-Jin Kwon , Gae-Youn Kim , Dae-Myung Kim , Kwon-Ho Song , Dong-Oh Lee , Suk-Jae Lee , Kwang-Hyun Cho , Byeng-Seok Choi , Ju-Yeong Lee , Hyun-Ju Hong
IPC: G06F3/0488 , G06F3/0485 , G06F1/16 , G06F3/0481 , G06F3/0484
Abstract: An electronic device is provided. The electronic device includes a display and a processor operatively connected to the display and configured to control the display to display a window related to context recognition on the display according to a predefined first layout corresponding to a first event related to screen splitting and control the display to display at least two windows split with respect to a folded portion of the display according to a predefined second layout corresponding to a second event related to the screen splitting.
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Patent Agency Ranking
公开(公告)号：US10114479B2
公开(公告)日：2018-10-30
申请号：US14619467
申请日：2015-02-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Woo-Yong Lee , Jae-Sook Joo , Yeon-Gi Jin , Yong-Jin Kwon , Byung-Wook Kim , Eun-Ju Lee , Yun-Jung Han
IPC: G06F3/00 , G06F3/0346 , G06F3/0484 , G06F3/0481
Abstract: An electronic device and a method for controlling a display are provided. The method includes sensing, via the electronic device, a rotation of the electronic device, identifying, by the electronic device, at least one layer having direction information that is different from a direction of the sensed rotation among a plurality of layers included in an application, changing, via the electronic device, a direction of the identified at least one layer to a direction corresponding to the sensed rotation, and displaying, via the electronic device, the application including the changed at least one layer.
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4.发明授权Nonvolatile memory device having read circuits for performing Read-While-Write (RWW) operation and Read-Modify-Write (RMW) operation 有权具有用于执行读写（RWW）操作和读取 - 修改 - 写入（RMW）操作的读取电路的非易失性存储器件公开(公告)号：US09135994B2
公开(公告)日：2015-09-15
申请号：US14171873
申请日：2014-02-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyo-Jin Kwon , Hoi-Ju Chung , Chae-Hoon Kim , Yong-Jin Kwon , Eun-Hye Park , Yong-Jun Lee
CPC classification number: G11C13/004 , G11C13/0002 , G11C13/0004 , G11C13/0061 , G11C2213/72
Abstract: A nonvolatile memory device includes a memory array having multiple nonvolatile memory cells, a first read circuit and a second read circuit. The first read circuit is configured to read first data from the memory array during a first read operation and to provide one or more protection signals indicating a victim period during the first read operation. The second read circuit is configured to read second data from the memory array during a second read operation and to provide one or more check signals indicating an aggressor period during the second read operation.
Abstract translation: 非易失性存储器件包括具有多个非易失性存储单元的存储器阵列，第一读取电路和第二读取电路。 第一读取电路被配置为在第一读取操作期间从存储器阵列读取第一数据，并且在第一读取操作期间提供指示受害时段的一个或多个保护信号。 第二读取电路被配置为在第二读取操作期间从存储器阵列读取第二数据，并且在第二读取操作期间提供指示侵略者周期的一个或多个检查信号。
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5.发明申请NONVOLATILE MEMORY DEVICE USING A RESISTANCE MATERIAL AND A DRIVING METHOD THEREOF 有权使用电阻材料的非易失性存储器件及其驱动方法公开(公告)号：US20150003137A1
公开(公告)日：2015-01-01
申请号：US14317162
申请日：2014-06-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yong-Jun Lee , Hoi-Ju Chung , Yong-Jin Kwon , Hyo-Jin Kwon , Eun-Hye Park
IPC: G11C13/00
CPC classification number: G11C13/004 , G11C7/1039 , G11C7/1042 , G11C11/5678 , G11C11/5685 , G11C13/0061 , G11C2213/71 , G11C2213/72
Abstract: A nonvolatile memory device includes a buffer memory, a read circuit configured to read first data stored in the buffer memory in a first read operation, and a write circuit configured to write second data in the buffer memory in a first write operation, wherein the first write operation is performed when a first internal write command is generated during the first read operation.
Abstract translation: 非易失性存储器件包括缓冲存储器，被配置为在第一读取操作中读取存储在缓冲存储器中的第一数据的读取电路和被配置为在第一写入操作中将第二数据写入缓冲存储器的写入电路，其中第一 在第一读取操作期间产生第一内部写入命令时执行写入操作。
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6.发明授权Nonvolatile memory device using a resistance material and a driving method thereof 有权使用电阻材料的非易失性存储器件及其驱动方法公开(公告)号：US09299429B2
公开(公告)日：2016-03-29
申请号：US14317162
申请日：2014-06-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yong-Jun Lee , Hoi-Ju Chung , Yong-Jin Kwon , Hyo-Jin Kwon , Eun-Hye Park
CPC classification number: G11C13/004 , G11C7/1039 , G11C7/1042 , G11C11/5678 , G11C11/5685 , G11C13/0061 , G11C2213/71 , G11C2213/72
Abstract: A nonvolatile memory device includes a buffer memory, a read circuit configured to read first data stored in the buffer memory in a first read operation, and a write circuit configured to write second data in the buffer memory in a first write operation, wherein the first write operation is performed when a first internal write command is generated during the first read operation.
Abstract translation: 非易失性存储器件包括缓冲存储器，被配置为在第一读取操作中读取存储在缓冲存储器中的第一数据的读取电路和被配置为在第一写入操作中将第二数据写入缓冲存储器的写入电路，其中第一 在第一读取操作期间产生第一内部写入命令时执行写入操作。
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7.发明授权公开(公告)号：US09093146B2
公开(公告)日：2015-07-28
申请号：US14171849
申请日：2014-02-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Eun-Hye Park , Hoi-Ju Chung , Yong-Jin Kwon , Hyo-Jin Kwon , Yong-Jun Lee
CPC classification number: G11C13/0061 , G11C13/0002 , G11C13/004 , G11C2213/72
Abstract: A nonvolatile memory device comprises a memory core comprising a plurality of variable resistance memory cells, an input/output (I/O) circuit configured to receive a first packet signal and a second packet signal in sequence, the first and second packet signals collectively comprising information for a memory access operation, and further configured to initiate a core access operation upon decoding the first packet signal and to selectively continue or discontinue the core access operation upon decoding the second packet signal, and a read circuit configured to perform part of the core access operation in response to the first packet signal before the second packet signal is decoded.
Abstract translation: 非易失性存储器件包括存储器芯，其包括多个可变电阻存储器单元，输入/输出（I / O）电路被配置为依次接收第一分组信号和第二分组信号，第一和第二分组信号共同地包括 用于存储器访问操作的信息，并且还被配置为在解码所述第一分组信号时发起核心访问操作，并且在解码所述第二分组信号时选择性地继续或中断所述核心访问操作;以及读取电路，被配置为执行所述核心的一部分 在第二分组信号被解码之前响应于第一分组信号的接入操作。
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