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公开(公告)号:US11775224B2
公开(公告)日:2023-10-03
申请号:US16986231
申请日:2020-08-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Fred Worley , Harry Rogers , Gunneswara Marripudi , Zhan Ping , Vikas Sinha
CPC classification number: G06F3/0661 , G06F3/0613 , G06F3/0629 , G06F3/0632 , G06F3/0658 , G06F3/0683 , G06F3/0688 , G06F13/4022 , G06F13/4081 , G06F13/4282
Abstract: Embodiments of the inventive concept include solid state drive (SSD) multi-card adapters that can include multiple solid state drive cards, which can be incorporated into existing enterprise servers without major architectural changes, thereby enabling the server industry ecosystem to easily integrate evolving solid state drive technologies into servers. The SSD multi-card adapters can include an interface section between various solid state drive cards and drive connector types. The interface section can perform protocol translation, packet switching and routing, data encryption, data compression, management information aggregation, virtualization, and other functions.
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公开(公告)号:US10466923B2
公开(公告)日:2019-11-05
申请号:US14918554
申请日:2015-10-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Zhan Ping , Harry Rogers
IPC: G06F3/06 , G06F13/362 , G06F13/40 , G06F13/42 , G06F1/16
Abstract: Embodiments of the inventive concept include Open Cloud Server (OCS)-compliant and other enterprise servers having high-density modular non-volatile flash memory blades and associated multi-card modules. A modular non-volatile flash memory blade can be seated within a 1 U tray. The flash memory blade can include a server motherboard and multiple non-volatile flash memory blade multi-card modules. Each of the multi-card modules can include a printed circuit board, a switch coupled to the printed circuit board, a module power port, an input/output port, and riser card slots to receive solid state drive riser cards. The solid state drive riser cards can be seated within a corresponding riser card slot of the multi-card modules, and can each include multiple solid state drive chips. The server motherboard can communicate with the solid state drive chips via the cable connector riser cards and associated cables. The switch can expand each upstream port to multiple downstream ports associate with the solid state drive chips.
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公开(公告)号:US09841904B2
公开(公告)日:2017-12-12
申请号:US14809165
申请日:2015-07-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Zhan Ping
CPC classification number: G06F3/061 , G06F3/0655 , G06F3/0688 , G06F13/4022
Abstract: Embodiments of the inventive concept include a non-volatile memory module array system. The system can include non-volatile memory modules each including a first port, a second port, solid state drives, a switch, and a port configuration logic section. The system can include a bus connected to the first or second ports. The system can include a host to communicate with the non-volatile memory modules via the bus. The port configuration logic section can toggle between a first port configuration associated with the second port and a second port configuration associated with the second port. The port configuration logic section can include a first non-volatile configuration section to store the first and second port configurations associated with the second port. The first port configuration can cause the second port to operate as a downstream port. The second port configuration can cause the second port to operate as an upstream port.
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公开(公告)号:US11693747B2
公开(公告)日:2023-07-04
申请号:US16436087
申请日:2019-06-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Gunneswara R. Marripudi , Stephen G. Fischer , Zhan Ping , Indira Joshi , Harry Rogers
CPC classification number: G06F11/2025 , G06F11/201 , G06F11/2028 , G06F11/2033 , G06F11/2035 , G06F11/2046 , G06F11/2092 , G06F11/2094 , G06F13/4022 , G06F13/4282
Abstract: A computing system providing high-availability access to computing resources includes: a plurality of interfaces; a plurality of sets of computing resources, each of the sets of computing resources including a plurality of computing resources; and at least three switches, each of the switches being connected to a corresponding one of the interfaces via a host link and being connected to a corresponding one of the sets of computing resources via a plurality of resource connections, each of the switches being configured such that data traffic is distributed to remaining ones of the switches through a plurality of cross-connections between the switches if one of the switches fails.
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公开(公告)号:US20220326748A1
公开(公告)日:2022-10-13
申请号:US17848138
申请日:2022-06-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Zhan Ping
Abstract: A storage system with temperature control. The system includes a plurality of storage devices such as solid state drives, a system controller such as a baseboard management controller, and one or more cooling fans. Each storage devices includes a controller configured to estimate the heat load in the storage device and/or an effective temperature, resulting from operations performed in the storage device. The system controller employs active disturbance rejection control to adjust the fan speed based on the estimated heat loads, the estimated temperatures, and/or the sensed internal temperatures, of the storage devices.
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公开(公告)号:US20200379933A1
公开(公告)日:2020-12-03
申请号:US16994405
申请日:2020-08-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Fred Worley , Harry Rogers , Sreenivas Krishnan , Zhan Ping , Michael Scriber
Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
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公开(公告)号:US10809780B2
公开(公告)日:2020-10-20
申请号:US15961782
申请日:2018-04-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Zhan Ping , Qinling Zheng
Abstract: A system and method for active disturbance rejection based thermal control is configured to receive, at a first active disturbance rejection thermal control (ADRC) controller, a first temperature measurement from a first thermal zone. The ADRC controller generates a first output control signal for controlling a first cooling element, wherein the first output control signal is generated according a first estimated temperature and a first estimated disturbance calculated by a first extended state observer (ESO) of the first ADRC controller.
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8.
公开(公告)号:US20190243796A1
公开(公告)日:2019-08-08
申请号:US15961583
申请日:2018-04-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Zhan Ping
CPC classification number: G06F13/4068 , G06F13/1668 , G06F13/4022 , G06F2213/0026 , H04L67/104
Abstract: A data storage module includes: a circuit chip receiving network packets and translating the network packets received from a host computer to a peripheral component interconnect express (PCIe) packets; a field-programmable grid array (FPGA); and one or more data storage devices storing data received from the host computer over the network packets. The circuit chip is coupled to the FPGA and the one or more data storage devices over a PCIe interface. The FPGA is programmably configured to perform one or more data processing acceleration on the data received from the circuit chip over the PCIe interface.
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公开(公告)号:US10114778B2
公开(公告)日:2018-10-30
申请号:US15090409
申请日:2016-04-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Fred Worley , Harry Rogers , Sreenivas Krishnan , Zhan Ping , Michael Scriber
Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
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公开(公告)号:US10002044B2
公开(公告)日:2018-06-19
申请号:US14678977
申请日:2015-04-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Chaohong Hu , Hongzhong Zheng , Uksong Kang , Zhan Ping
CPC classification number: G06F11/10 , G06F11/1008 , G06F11/1076
Abstract: A memory module includes a module error interface, a module data interface, and a plurality of memory device. The module error interface communicates error information a system control path. The module data interface communicates data to and from a main memory path that is separate from the system control path. Each memory device includes a device controller, a device error interface and a device data interface in which the error data interface is separate from the device data interface. Each device controller includes an ECC engine and an ECC controller. The ECC engine corrects an error in data that is read from the corresponding memory device to generate corrected data, generate error information, communicate the error information through the device error interface to the module error interface, and communicate the corrected data through the device data interface to the module data interface. The ECC controller records the error information.
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