公开(公告)号：US20210183882A1

公开(公告)日：2021-06-17

申请号：US16710481

申请日：2019-12-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yanli ZHANG ,  Dong-il MOON ,  Raghuveer S. MAKALA ,  Peng ZHANG ,  Wei ZHAO ,  Ashish BARASKAR

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L23/532 ,  H01L21/311 ,  H01L27/11526 ,  H01L27/11519 ,  H01L27/11565 ,  H01L27/11573 ,  H01L21/28 ,  H01L23/528

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, and memory stack structures extending through the alternating stack. Each of the memory stack structures contains a memory film and a vertical semiconductor channel. At least one of the electrically conductive layers contains a first conductive material portion having a respective inner sidewall that contacts a respective one of the memory films at a vertical interface, and a second conductive material portion that has a different composition from the first conductive material portion, and contacting the first electrically conductive material portion. The first conductive material portion has a lower work function than the second conductive material portion.

公开(公告)号：US20210082865A1

公开(公告)日：2021-03-18

申请号：US17106831

申请日：2020-11-30

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ashish BARASKAR ,  Raghuveer S. MAKALA ,  Peter RABKIN

IPC: H01L23/00 ,  H01L21/762 ,  H01L25/00 ,  H01L25/18 ,  H01L21/683

Abstract: A semiconductor structure includes a memory die bonded to a support die. The memory die includes an alternating stack of insulating layers and electrically conductive layers located over a first single crystalline semiconductor layer, and memory stack structures extending through the alternating stack and containing respective memory film and a respective vertical semiconductor channel including a single crystalline channel semiconductor material. The support die includes a peripheral circuitry. Substrates employed to provide the memory die and the support die can be reused by replacing one of the substrates with an alternative low-cost substrate that provides structural support to the bonded assembly.

公开(公告)号：US20210183883A1

公开(公告)日：2021-06-17

申请号：US16710572

申请日：2019-12-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yanli ZHANG ,  Dong-il MOON ,  Raghuveer S. MAKALA ,  Peng ZHANG ,  Wei ZHAO ,  Ashish BARASKAR

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L23/528 ,  H01L23/532 ,  H01L23/522 ,  H01L21/768 ,  H01L21/28 ,  H01L27/11526 ,  H01L27/11519 ,  H01L27/11565 ,  H01L27/11573

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, and memory stack structures extending through the alternating stack. Each of the memory stack structures contains a memory film and a vertical semiconductor channel. At least one of the electrically conductive layers contains a first conductive material portion having a respective inner sidewall that contacts a respective one of the memory films at a vertical interface, and a second conductive material portion that has a different composition from the first conductive material portion, and contacting the first electrically conductive material portion. The first conductive material portion has a lower work function than the second conductive material portion.

公开(公告)号：US20210375910A1

公开(公告)日：2021-12-02

申请号：US16887818

申请日：2020-05-29

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ashish BARASKAR ,  Peter RABKIN ,  Raghuveer S. MAKALA

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11543 ,  H01L27/11556 ,  H01L29/207 ,  H01L23/522

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, and a memory stack structure vertically extending through the alternating stack. The memory stack structure includes a vertical semiconductor channel and a memory film. The vertical semiconductor channel can include a III-V compound semiconductor channel material. A III-V compound substrate semiconductor layer or a III-V compound semiconductor source region can be used to provide low-resistance electrical connection to a bottom end of the vertical semiconductor channel, and a drain region including a graded III-V compound semiconductor material can be used to provide low-resistance electrical connection to a top end of the vertical semiconductor channel.

公开(公告)号：US20210375909A1

公开(公告)日：2021-12-02

申请号：US16887738

申请日：2020-05-29

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ashish BARASKAR ,  Peter RABKIN ,  Raghuveer S. MAKALA

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11543 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/207 ,  H01L23/522

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, and a memory stack structure vertically extending through the alternating stack. The memory stack structure includes a vertical semiconductor channel and a memory film. The vertical semiconductor channel can include a III-V compound semiconductor channel material. A III-V compound substrate semiconductor layer or a III-V compound semiconductor source region can be used to provide low-resistance electrical connection to a bottom end of the vertical semiconductor channel, and a drain region including a graded III-V compound semiconductor material can be used to provide low-resistance electrical connection to a top end of the vertical semiconductor channel.

公开(公告)号：US20210375908A1

公开(公告)日：2021-12-02

申请号：US16887659

申请日：2020-05-29

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ashish BARASKAR ,  Peter RABKIN ,  Raghuveer S. MAKALA

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L27/11565 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11543 ,  H01L27/11556 ,  H01L29/207

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, and a memory stack structure vertically extending through the alternating stack. The memory stack structure includes a vertical semiconductor channel and a memory film. The vertical semiconductor channel can include a III-V compound semiconductor channel material. A III-V compound substrate semiconductor layer or a III-V compound semiconductor source region can be used to provide low-resistance electrical connection to a bottom end of the vertical semiconductor channel, and a drain region including a graded III-V compound semiconductor material can be used to provide low-resistance electrical connection to a top end of the vertical semiconductor channel.

公开(公告)号：US20200258896A1

公开(公告)日：2020-08-13

申请号：US16272468

申请日：2019-02-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ashish BARASKAR ,  Fei ZHOU ,  Ching-Huang LU ,  Raghuveer S. MAKALA

IPC: H01L27/11558 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate, and memory stack structures are formed through the alternating stack. A backside trench is formed through the alternating stack, and backside recesses are formed by removing the sacrificial material layers. An undoped aluminum oxide backside blocking dielectric layer is formed in the backside recesses and on sidewalls the backside trench. A portion of the undoped aluminum oxide backside blocking dielectric layer located at an upper end of the backside trench is converted into a carbon-doped aluminum oxide layer. An electrically conductive material is deposited in the backside recesses and at peripheral regions of the backside trench. The electrically conductive material at the peripheral regions of the backside trench is removed by an etch process, with the carbon-doped aluminum oxide layer providing etch resistivity during the etch process.