公开(公告)号：US20240260267A1

公开(公告)日：2024-08-01

申请号：US18356919

申请日：2023-07-21

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Masanori TSUTSUMI ,  Naohiro HOSODA ,  Takumi MORIYAMA ,  Ryota SUZUKI ,  Takashi KUDO ,  Nobuyuki FUJIMURA

IPC: H10B43/27 ,  H10B43/35

CPC classification number: H10B43/27 ,  H10B43/35

Abstract: A method of making a memory device includes forming an alternating stack of insulating layers and sacrificial material layers, where a silicon oxycarbide liner is interposed between a first sacrificial material layer and a first insulating layer, and the first sacrificial material layer is direct contact with a second insulating layer or a dielectric material layer composed of a silicon oxide material, forming a memory opening through the alternating stack, forming a memory opening fill structure in the memory opening, forming backside recesses by removing the sacrificial material layers selective to the silicon oxycarbide liner, and forming electrically conductive layers in the backside recesses.

公开(公告)号：US20230328984A1

公开(公告)日：2023-10-12

申请号：US18060732

申请日：2022-12-01

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Nobuyuki FUJIMURA ,  Takashi KUDO ,  Shunsuke TAKUMA ,  Satoshi SHIMIZU

IPC: H10B43/27 ,  H10B41/27

CPC classification number: H01L27/11582 ,  H01L27/11556

Abstract: A memory device includes at least one alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the at least one alternating stack, and a memory opening fill structure located in the memory opening and containing a vertical stack of memory elements and a vertical semiconductor channel. The memory opening fill structure includes a lateral protrusion having a tapered sidewall surface; and one of the electrically conductive layers is a taper-containing electrically conductive layer that is located at a level of the lateral protrusion of the memory opening fill structure.