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公开(公告)号:US10141331B1
公开(公告)日:2018-11-27
申请号:US15607583
申请日:2017-05-29
发明人: Hiromasa Susuki , Masanori Tsutsumi , Shigehisa Inoue , Junji Oh , Kensuke Yamaguchi , Seiji Shimabukuro , Yuji Fukano , Ryoichi Ehara , Youko Furihata
IPC分类号: H01L29/76 , H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/1157
CPC分类号: H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/1157
摘要: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, the alternating stack containing a memory array region and a terrace region. Memory stack structures containing a memory film and a vertical semiconductor channel extend through the memory array region of the alternating stack. Support pillar structures extending through the terrace region of the alternating stack. The support pillar structures have different heights from each other.
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2.
公开(公告)号:US09780034B1
公开(公告)日:2017-10-03
申请号:US15183195
申请日:2016-06-15
发明人: Masanori Tsutsumi , Kota Funayama , Ryoichi Ehara , Youko Furihata , Zhenyu Lu , Tong Zhang , Tadashi Nakamura
IPC分类号: H01L29/792 , H01L23/528 , H01L27/1157 , H01L27/11582 , H01L23/522 , H01L21/768
CPC分类号: H01L21/76816 , H01L21/76877 , H01L27/11565 , H01L27/1157 , H01L27/11582
摘要: A method of forming a monolithic three-dimensional memory device includes forming a first alternating stack over a substrate, forming an insulating cap layer, forming a first memory opening through the insulating cap layer and the first alternating stack, forming a sacrificial pillar structure in the first memory opening, forming a second alternating stack, forming a second memory opening, forming an inter-stack memory opening, forming a memory film and a first semiconductor channel layer in the inter-stack memory opening, anisotropically etching a horizontal bottom portion of the memory film and the first semiconductor channel layer to expose the substrate at the bottom of the inter-stack memory opening such that damage to portions of the first semiconductor channel layer and the memory film located adjacent to the insulating cap layer is reduced or avoided, and forming a second semiconductor channel layer in contact with the exposed substrate in the inter-stack memory opening.
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公开(公告)号:US20180342531A1
公开(公告)日:2018-11-29
申请号:US15607583
申请日:2017-05-29
发明人: Hiromasa Susuki , Masanori Tsutsumi , Shigehisa Inoue , Junji Oh , Kensuke Yamaguchi , Seiji Shimabukuro , Yuji Fukano , Ryoichi Ehara , Youko Furihata
IPC分类号: H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/1157
摘要: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, the alternating stack containing a memory array region and a terrace region. Memory stack structures containing a memory film and a vertical semiconductor channel extend through the memory array region of the alternating stack. Support pillar structures extending through the terrace region of the alternating stack. The support pillar structures have different heights from each other.
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