公开(公告)号：US10242994B2

公开(公告)日：2019-03-26

申请号：US15704370

申请日：2017-09-14

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Takashi Inomata ,  Nobuo Hironaga ,  Junichi Ariyoshi ,  Tadashi Nakamura

IPC: H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L27/11565 ,  H01L27/11519 ,  H01L29/792 ,  H01L27/11575

Abstract: A monolithic three-dimensional memory device includes a first alternating stack of first insulating layers and first electrically conductive layers located over a top surface of a substrate, an insulating cap layer overlying the first alternating stack, a second alternating stack of second insulating layers and second electrically conductive layers and overlying the insulating cap layer, memory openings extending through the second alternating stack, the insulating cap layer, and the first alternating stack, memory stack structures located within the memory openings, and annular spacers located within the insulating cap layer and laterally surrounding a respective one of the memory stack structures.

公开(公告)号：US10777570B2

公开(公告)日：2020-09-15

申请号：US15990037

申请日：2018-05-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tadashi Nakamura ,  Jin Liu ,  Kazuya Tokunaga ,  Marika Gunji-Yoneoka ,  Matthias Baenninger ,  Hiroyuki Kinoshita ,  Murshed Chowdhury ,  Jiyin Xu

IPC: H01L27/11582 ,  H01L29/06 ,  H01L29/10 ,  H01L23/528 ,  H01L29/423 ,  H01L21/311 ,  H01L21/764 ,  H01L23/29 ,  H01L23/31 ,  H01L49/02

Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.

公开(公告)号：US10600802B2

公开(公告)日：2020-03-24

申请号：US15914560

申请日：2018-03-07

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tadashi Nakamura ,  Kota Funayama

IPC: H01L27/11582 ,  H01L29/788 ,  H01L29/10 ,  H01L21/311 ,  H01L29/66 ,  H01L21/3105 ,  H01L21/02 ,  H01L27/11556 ,  H01L21/28 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11521 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/792 ,  H01L27/11529 ,  H01L27/11524 ,  H01L27/1157

Abstract: A first alternating stack of first insulating layers and first spacer layers, an inter-tier dielectric layer, a sacrificial memory opening fill structure, and a second alternating stack of second insulating layers and second spacer layers are formed over a substrate. The spacer layers are formed as, or are subsequently replaced with, electrically conductive layers. A concave downward-facing surface of the inter-tier dielectric layer is formed on a convex upper surface of the sacrificial memory opening fill structure. An inter-tier memory opening is provided by forming second-tier memory opening and removing the sacrificial memory opening fill structure. A memory stack structure including a memory film is formed in the inter-tier memory opening. The memory film includes a rounded top surface at the joint between tiers to enhance its reliability.

公开(公告)号：US20180277567A1

公开(公告)日：2018-09-27

申请号：US15990037

申请日：2018-05-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tadashi Nakamura ,  Jin Liu ,  Kazuya Tokunaga ,  Marika Gunji-Yoneoka ,  Matthias Baenninger ,  Hiroyuki Kinoshita ,  Murshed Chowdhury ,  Jiyin Xu

IPC: H01L27/11582 ,  H01L49/02 ,  H01L23/31 ,  H01L23/29 ,  H01L21/764 ,  H01L29/423 ,  H01L23/528 ,  H01L29/10 ,  H01L29/06 ,  H01L21/311

CPC classification number: H01L27/11582 ,  H01L21/31111 ,  H01L21/764 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/528 ,  H01L28/00 ,  H01L29/0649 ,  H01L29/1037 ,  H01L29/42372

Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.

公开(公告)号：US09991280B2

公开(公告)日：2018-06-05

申请号：US15434544

申请日：2017-02-16

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tadashi Nakamura ,  Jin Liu ,  Kazuya Tokunaga ,  Marika Gunji-Yoneoka ,  Matthias Baenninger ,  Hiroyuki Kinoshita ,  Murshed Chowdhury ,  Jiyin Xu ,  Dai Iwata ,  Hiroyuki Ogawa ,  Kazutaka Yoshizawa ,  Yasuaki Yonemochi

IPC: H01L27/115 ,  H01L27/11582 ,  H01L29/06 ,  H01L29/10 ,  H01L23/528 ,  H01L29/423 ,  H01L21/311 ,  H01L21/764 ,  H01L23/29 ,  H01L23/31 ,  H01L49/02

CPC classification number: H01L27/11582 ,  H01L21/31111 ,  H01L21/764 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/528 ,  H01L28/00 ,  H01L29/0649 ,  H01L29/1037 ,  H01L29/42372

Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.

公开(公告)号：US09780034B1

公开(公告)日：2017-10-03

申请号：US15183195

申请日：2016-06-15

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Masanori Tsutsumi ,  Kota Funayama ,  Ryoichi Ehara ,  Youko Furihata ,  Zhenyu Lu ,  Tong Zhang ,  Tadashi Nakamura

IPC: H01L29/792 ,  H01L23/528 ,  H01L27/1157 ,  H01L27/11582 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L21/76816 ,  H01L21/76877 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11582

Abstract: A method of forming a monolithic three-dimensional memory device includes forming a first alternating stack over a substrate, forming an insulating cap layer, forming a first memory opening through the insulating cap layer and the first alternating stack, forming a sacrificial pillar structure in the first memory opening, forming a second alternating stack, forming a second memory opening, forming an inter-stack memory opening, forming a memory film and a first semiconductor channel layer in the inter-stack memory opening, anisotropically etching a horizontal bottom portion of the memory film and the first semiconductor channel layer to expose the substrate at the bottom of the inter-stack memory opening such that damage to portions of the first semiconductor channel layer and the memory film located adjacent to the insulating cap layer is reduced or avoided, and forming a second semiconductor channel layer in contact with the exposed substrate in the inter-stack memory opening.

公开(公告)号：US20190280000A1

公开(公告)日：2019-09-12

申请号：US15914560

申请日：2018-03-07

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tadashi Nakamura ,  Kota Funayama

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L29/788 ,  H01L29/10 ,  H01L21/311 ,  H01L21/28 ,  H01L29/66 ,  H01L21/3105 ,  H01L21/02

Abstract: A first alternating stack of first insulating layers and first spacer layers, an inter-tier dielectric layer, a sacrificial memory opening fill structure, and a second alternating stack of second insulating layers and second spacer layers are formed over a substrate. The spacer layers are formed as, or are subsequently replaced with, electrically conductive layers. A concave downward-facing surface of the inter-tier dielectric layer is formed on a convex upper surface of the sacrificial memory opening fill structure. An inter-tier memory opening is provided by forming second-tier memory opening and removing the sacrificial memory opening fill structure. A memory stack structure including a memory film is formed in the inter-tier memory opening. The memory film includes a rounded top surface at the joint between tiers to enhance its reliability.

公开(公告)号：US10115730B1

公开(公告)日：2018-10-30

申请号：US15626766

申请日：2017-06-19

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ashish Baraskar ,  Naohiro Hosoda ,  Yanli Zhang ,  Raghuveer S. Makala ,  Hiroyuki Tanaka ,  Ryo Nakamura ,  Tadashi Nakamura

IPC: H01L27/115 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11524 ,  H01L27/1157 ,  H01L21/265

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a semiconductor surface, a memory opening extending through the alternating stack, a semiconductor pedestal channel portion located at a bottom portion of the memory opening and contacting a top surface of the semiconductor surface, and a memory stack structure located in the memory opening and contacting a top surface of the pedestal channel portion. The memory stack structure includes a memory film and a vertical semiconductor channel located inside the memory film. A maximum lateral extent of the pedestal channel portion is greater than a maximum lateral dimension of an entire interface between the pedestal channel portion and the memory stack structure.

公开(公告)号：US10991718B2

公开(公告)日：2021-04-27

申请号：US16526128

申请日：2019-07-30

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Jayavel Pachamuthu ,  Hiroyuki Kinoshita ,  Marika Gunji-Yoneoka ,  Tadashi Nakamura ,  Tomohiro Oginoe

IPC: H01L27/11582 ,  H01L21/28 ,  H01L21/02 ,  H01L21/285 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L29/45 ,  H01L29/167 ,  H01L29/04

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. A memory opening is formed through the alternating stack. A memory film is formed in the memory opening. The memory film includes an opening at a bottom portion. A connection strap is formed by performing a selective semiconductor deposition process that grows a strap semiconductor material from a physically exposed surface of an underlying semiconductor material portion through the opening. A vertical semiconductor channel is formed on an inner sidewall of the memory film by non-selectively depositing a semiconductor channel material. The connection strap provides an electrical connection between the underlying semiconductor material portion and the vertical semiconductor channel through the opening in the memory film. The sacrificial material layers are then replaced with electrically conductive layers.