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公开(公告)号：US09030892B2
公开(公告)日：2015-05-12
申请号：US13663952
申请日：2012-10-30
发明人： Kotaro Watanabe , Makoto Mitani
CPC分类号： G11C16/28
摘要： There is disclosed a data reading device in which data of a nonvolatile storage element is reflected in a circuit to be regulated, with a minimum necessary delay width after turning a power on or after reset cancellation, and wrong writing due to a static electricity is prevented. A delay circuit is additionally disposed to output a delayed data reading signal after a signal of turning the power on or a signal of the reset cancellation is generated. A delay time T2 and a static electricity convergence time T1 are set so as to keep a relation of T1
摘要翻译： 公开了一种数据读取装置，其中非易失性存储元件的数据被反映在要调节的电路中，在打开电源或复位消除之后具有最小必需的延迟宽度，并且防止由静电引起的错误写入 。 另外设置延迟电路以在开启电源或产生复位消除的信号之后输出延迟的数据读取信号。 延迟时间T2和静电收敛时间T1被设定为保持T1
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公开(公告)号：US09310775B2
公开(公告)日：2016-04-12
申请号：US14797416
申请日：2015-07-13
发明人： Makoto Mitani , Kotaro Watanabe
摘要： To provide an analog electronic timepiece which prevents a crystal oscillation circuit from malfunctioning even if a battery voltage is lowered at motor loading. An analog electronic timepiece is equipped with a crystal vibrator, an oscillation circuit, a frequency division circuit, a constant voltage circuit, an output control circuit, and a motor. The analog electronic timepiece is configured in such a manner that the constant voltage circuit has a voltage holding circuit connected between a gate of an output transistor and a power supply terminal, and the oscillation circuit and the frequency division circuit are operated with a constant voltage generated by the constant voltage circuit as a power supply.
摘要翻译： 为了提供即使在电动机负载下电池电压降低的情况下也能防止晶体振荡电路发生故障的模拟电子钟表。 模拟电子钟表配备有晶体振子，振荡电路，分频电路，恒压电路，输出控制电路和电动机。 模拟电子钟表被配置成使得恒压电路具有连接在输出晶体管的栅极和电源端子之间的电压保持电路，并且以产生的恒定电压来操作振荡电路和分频电路 由恒压电路作为电源。
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公开(公告)号：US09071185B2
公开(公告)日：2015-06-30
申请号：US14172627
申请日：2014-02-04
发明人： Kotaro Watanabe , Makoto Mitani
CPC分类号： H02P23/0095 , G04C10/00 , G04G19/06 , G05F1/613 , H02M2001/0006 , H02M2001/0035 , Y02B70/16
摘要： There are provided a constant voltage circuit that outputs a stable constant voltage for an analog electronic clock, and an analog electronic clock featuring low current consumption and prolonged battery life. The constant voltage circuit has a first voltage holding circuit connected between the gate of an output transistor and an output terminal and a second voltage holding circuit connected between the gate of the output transistor and a ground terminal, and carries out control such that the second voltage holding circuit is enabled when the motor is operated.
摘要翻译： 提供了一个恒定电压电路，为模拟电子时钟输出稳定的恒定电压，以及具有低电流消耗和延长电池寿命的模拟电子时钟。 恒压电路具有连接在输出晶体管的栅极和输出端子之间的第一电压保持电路和连接在输出晶体管的栅极与接地端子之间的第二电压保持电路，并且进行控制，使得第二电压 保持电路在电机运行时使能。
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公开(公告)号：US10203664B2
公开(公告)日：2019-02-12
申请号：US15244178
申请日：2016-08-23
发明人： Kazumi Sakumoto , Kotaro Watanabe , Minoru Sano
IPC分类号： G04G19/12
摘要： An electronic timepiece includes a first switch connected to a signal line, a second switch, and a one-shot pulse signal generation circuit. The first switch is inserted into the signal line. One end of the second switch is connected to the signal line at a rear stage of the first switch, and the other end of the second switch is connected to a power source. The one-shot pulse signal generation circuit generates a one-shot pulse signal by using a reference clock signal, and the second switch is controlled by the one-shot pulse signal. The timepiece device can reduce currents flowing in a pull-down resistor or a pull-up resistor when a crown switch is turned on.
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公开(公告)号：US09704771B2
公开(公告)日：2017-07-11
申请号：US14927040
申请日：2015-10-29
发明人： Yoichi Mimuro , Kotaro Watanabe , Yukimasa Minami
CPC分类号： H01L23/3178 , H01L21/563 , H01L23/562 , H01L29/0657 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H01L2924/00
摘要： Provided is a flip-chip mounted semiconductor device in which a crack is less likely to develop. Flip chip mounting is carried out under the condition that no oxide film exists on the scribe region so as to eliminate the interface between the oxide film that remains on the scribe region and the silicon substrate from which a crack may develop. As a result, the circuit board, the encapsulant, and the silicon substrate are stacked at an end portion of the semiconductor chip.
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公开(公告)号：US09424943B2
公开(公告)日：2016-08-23
申请号：US14551725
申请日：2014-11-24
发明人： Kotaro Watanabe , Makoto Mitani
CPC分类号： G11C16/28 , G11C16/225
摘要： The present invention provides a data reading device capable of preventing erroneous writing during an operation of reading data from a non-volatile memory element. The data reading device includes a dummy reading circuit provided with a non-volatile memory element, the writing voltage of which is lower than that of a non-volatile memory element of a data reading circuit, and a state detection circuit that detects a written state of the non-volatile memory element of the dummy reading circuit. Upon detection of erroneous writing to the non-volatile memory element of the dummy reading circuit during a data reading operation, the data reading operation is immediately terminated.
摘要翻译： 本发明提供一种能够防止在从非易失性存储元件读取数据的操作期间错误写入的数据读取装置。 数据读取装置包括具有写入电压低于数据读取电路的非易失性存储元件的非易失性存储元件的虚拟读取电路，以及检测写入状态的状态检测电路 的虚拟读取电路的非易失性存储元件。 在数据读取操作期间检测到伪读取电路的非易失性存储元件的错误写入时，数据读取操作立即结束。
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公开(公告)号：US09343915B2
公开(公告)日：2016-05-17
申请号：US13784184
申请日：2013-03-04
发明人： Makoto Mitani , Kotaro Watanabe
IPC分类号： H02J7/00
CPC分类号： H02J7/0031 , H02J2007/0037
摘要： The semiconductor device includes the charging system including: electric power generating unit for supplying electric power; electric power storing unit for storing electric power generated by the electric power generating unit; switch unit provided in a charging path for charging the electric power storing unit with the electric power generated by the electric power generating unit; a comparator driven by the electric power generated by the electric power generating unit for comparing a reference voltage and a stored voltage of the electric power storing unit; and a level converter provided between the comparator and the switch unit for, based on a result of a comparison made by the comparator, converting a level of a generated voltage to a level of the stored voltage and outputting a resultant signal to the switch unit.
摘要翻译： 该半导体装置包括：充电系统，包括：用于供电的发电单元; 蓄电单元，用于存储由所述发电单元产生的电力; 开关单元，设置在充电路径中，用于利用所述发电单元产生的电力对所述蓄电单元进行充电; 由所述发电单元产生的用于比较所述电力存储单元的参考电压和存储电压的电力驱动的比较器; 以及设置在比较器和开关单元之间的电平转换器，用于基于由比较器进行的比较的结果，将所产生的电压的电平转换为存储电压的电平，并将结果信号输出到开关单元。
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公开(公告)号：US09235196B2
公开(公告)日：2016-01-12
申请号：US14161235
申请日：2014-01-22
发明人： Kotaro Watanabe , Makoto Mitani
摘要： There are provided a constant voltage circuit that features low current consumption and stable operation, and an analog electronic clock provided with the constant voltage circuit. The constant voltage circuit includes a differential amplifier circuit which is turned on/off by a predetermined signal and which controls the voltage of a gate of an output transistor on the basis of a reference voltage and a feedback voltage that are received, a switch circuit which is connected to an output terminal of the differential amplifier circuit and which is turned on/off by a predetermined signal, and a voltage holding circuit which is connected between the gate of the output transistor and a power supply terminal and which has a resistor and a capacitor connected in series. An analog electronic clock provided with the foregoing constant voltage circuit that supplies a voltage to at least an oscillation circuit and a frequency division circuit.
摘要翻译： 提供了具有低电流消耗和稳定运行的恒压电路，以及配有恒压电路的模拟电子时钟。 恒压电路包括通过预定信号导通/截止的差分放大电路，并根据接收到的基准电压和反馈电压来控制输出晶体管的栅极的电压;开关电路， 连接到差分放大器电路的输出端并通过预定信号导通/截止;以及电压保持电路，连接在输出晶体管的栅极和电源端之间，并具有电阻和 电容串联连接。 具有上述恒压电路的模拟电子时钟，其向至少一个振荡电路和分频电路提供电压。
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公开(公告)号：US08982656B2
公开(公告)日：2015-03-17
申请号：US14168759
申请日：2014-01-30
发明人： Makoto Mitani , Kotaro Watanabe
CPC分类号： G11C29/028 , G11C7/1057 , G11C7/106 , G11C7/1066 , G11C7/222 , G11C29/021
摘要： Provided is a semiconductor non-volatile memory device capable of improving the accuracy of trimming by creating a written state before data is written into a non-volatile memory element. The semiconductor non-volatile memory device includes: a written data transmission circuit for transmitting written data to a non-volatile memory element; a first switch connected between the non-volatile memory element and a data output terminal; a third switch connected to an output terminal of the written data transmission circuit; and a control circuit for controlling the respective switches. When a test mode signal is input, the control circuit turns on only the first switch and the third switch so as to control the written data to be output to the data output terminal before data is written into the non-volatile memory element.
摘要翻译： 提供一种半导体非易失性存储器件，其能够在将数据写入非易失性存储元件之前通过创建写入状态来提高修整精度。 半导体非易失性存储器件包括：写入数据传输电路，用于将写入的数据发送到非易失性存储器元件; 连接在所述非易失性存储元件与数据输出端子之间的第一开关; 连接到写入数据传输电路的输出端的第三开关; 以及用于控制各个开关的控制电路。 当输入测试模式信号时，控制电路仅打开第一开关和第三开关，以便在将数据写入非易失性存储元件之前控制写入数据输出到数据输出端。
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公开(公告)号：US09634608B2
公开(公告)日：2017-04-25
申请号：US14836625
申请日：2015-08-26
发明人： Kotaro Watanabe , Makoto Mitani
摘要： To provide a crystal oscillation circuit low in current consumption and stably short in oscillation start time. A crystal oscillation circuit is equipped with a crystal vibrator, a feedback resistor, a bias circuit, a constant voltage circuit, and an oscillation inverter configured by a constant current inverter. The oscillation inverter is configured so as to be controlled by currents based on input signals from the bias circuit and the crystal vibrator and driven by an output voltage of the constant voltage circuit.
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