HEMT DEVICES WITH REDUCED SIZE AND HIGH ALIGNMENT TOLERANCE

    公开(公告)号:US20240395922A1

    公开(公告)日:2024-11-28

    申请号:US18796258

    申请日:2024-08-06

    Abstract: A High Electron Mobility Transistor (HEMT) includes a source, a drain, a channel layer extending between the source and the drain, a barrier layer formed in contact with the channel layer, and extending between the source and the drain, and a gate formed in contact with, and covering at least a portion of, the barrier layer. The gate has gate edge portions and a gate central portion, and dielectric spacers may be formed over the gate edge portions, with the dielectric spacers having a first width therebetween proximal to the gate, and a second width therebetween distal from the gate, where the second width is longer than the first width.

    METHOD FOR FORMING OHMIC CONTACTS
    3.
    发明申请

    公开(公告)号:US20180308946A1

    公开(公告)日:2018-10-25

    申请号:US16017145

    申请日:2018-06-25

    Abstract: Implementations of an ohmic contact for a gallium nitride (GaN) device may include: a first layer including aluminum coupled directly with the GaN device; the GaN having a heterostructure with an undoped GaN channel and a semi-insulating aluminum gallium nitride (AlGaN) barrier, all the foregoing operatively coupled with a substrate; a second layer including titanium coupled over the first layer; and a third layer including an anti-diffusion material coupled with the second layer. A passivation layer may be coupled between the AlGaN barrier and the first layer of the ohmic contact. The passivation layer may surround the ohmic contact.

    Electronic Device Including a Contact Structure Contacting a Layer

    公开(公告)号:US20200144194A1

    公开(公告)日:2020-05-07

    申请号:US16183078

    申请日:2018-11-07

    Abstract: An electronic device can include a semiconductor layer and a contact structure forming an ohmic contact with the layer. In an embodiment, the semiconductor layer can include a III-N material, and the contact structure includes a first phase and a second phase, wherein the first phase includes Al, the second phase includes a metal, and the first phase contacts the semiconductor layer. In another embodiment, the semiconductor layer can be a monocrystalline layer having a surface along a crystal plane. The contact structure can include a polycrystalline material including crystals having surfaces that contact the surface of the monocrystalline layer, wherein a lattice mismatch between the surface of the monocrystalline layer and the surfaces of the crystals is at most 20%.

    HEMT DEVICES WITH REDUCED SIZE AND HIGH ALIGNMENT TOLERANCE

    公开(公告)号:US20220262940A1

    公开(公告)日:2022-08-18

    申请号:US17248989

    申请日:2021-02-16

    Abstract: A High Electron Mobility Transistor (HEMT) includes a source, a drain, a channel layer extending between the source and the drain, a barrier layer formed in contact with the channel layer, and extending between the source and the drain, and a gate formed in contact with, and covering at least a portion of, the barrier layer. The gate has gate edge portions and a gate central portion, and dielectric spacers may be formed over the gate edge portions, with the dielectric spacers having a first width therebetween proximal to the gate, and a second width therebetween distal from the gate, where the second width is longer than the first width.

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