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公开(公告)号:US20170092669A1
公开(公告)日:2017-03-30
申请号:US15375764
申请日:2016-12-12
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Rick JEROME , David T. PRICE , Sungkwon C. HONG , Gordon M. Grivna
IPC: H01L27/146 , H01L23/48
CPC classification number: H01L27/1464 , H01L21/76898 , H01L23/481 , H01L27/14605 , H01L27/1462 , H01L27/1463 , H01L27/14636 , H01L27/14643 , H01L27/14683 , H01L27/14685 , H01L27/14687 , H01L27/14689
Abstract: An image sensor structure includes a region of semiconductor material having a first major surface and a second major surface. A pixel structure is within the region of semiconductor material and includes a plurality of doped regions and a plurality of conductive structures. A metal-filled trench structure extends from the first major surface to the second major surface. A first contact structure is electrically connected to a first surface of the conductive trench structure, and a second contact structure electrically connected to a second surface of the conductive trench structure. In one embodiment, the second major surface is configured to receive incident light.
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公开(公告)号:US20170104946A1
公开(公告)日:2017-04-13
申请号:US14877722
申请日:2015-10-07
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Sungkwon C. HONG
IPC: H04N5/374 , H04N5/378 , H01L27/146 , H04N9/07
CPC classification number: H04N5/374 , H01L27/14609 , H01L27/1461 , H01L27/14612 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/14645 , H04N5/37452 , H04N5/378 , H04N9/07
Abstract: An imaging pixel may be provided with a photodiode and a floating diffusion region. The pixel may include at least one storage capacitor that can store charge from the floating diffusion region. The at least one storage capacitor may provide global shutter functionality for the pixel. Multiple storage capacitors may be provided for correlated double sampling (CDS) techniques and high dynamic range (HDR) images. The imaging pixel may have an upper substrate layer and a lower substrate layer. The photodiode may be formed in the upper substrate layer, and the storage capacitors may be formed in the lower substrate layer. A interconnect layer may couple pixel circuitry in the upper substrate layer to pixel circuitry in the lower substrate layer.
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