EDGE SEALS FOR SEMICONDUCTOR PACKAGES
    3.
    发明公开

    公开(公告)号:US20240194710A1

    公开(公告)日:2024-06-13

    申请号:US18586731

    申请日:2024-02-26

    CPC classification number: H01L27/14618 H01L27/14634 H01L27/14636

    Abstract: Implementations of semiconductor packages may include: a digital signal processor having a first side and a second side and an image sensor array, having a first side and a second side. The first side of the image sensor array may be coupled to the second side of the digital signal processor through a plurality of hybrid bond interconnect (HBI) bond pads and an edge seal. One or more openings may extend from the second side of the image sensor array into the second side of the digital signal processor to an etch stop layer in the second side of the digital signal processor. The one or more openings may form a second edge seal between the plurality of HBI bond pads and the edge of the digital signal processor.

    FIN TRANSISTORS WITH SEMICONDUCTOR SPACERS

    公开(公告)号:US20220181462A1

    公开(公告)日:2022-06-09

    申请号:US17247212

    申请日:2020-12-03

    Abstract: In a general aspect, a transistor can include a fin having a proximal end and a distal end. The fin can include a dielectric portion longitudinally extending between the proximal end and the distal end, and a semiconductor layer disposed on the dielectric portion. The semiconductor layer can longitudinally extend between the proximal end and the distal end. The transistor can further include a source region disposed at the proximal end of the fin, and a drain region disposed at the distal end of the fin. The transistor can also include a gate dielectric layer disposed on a channel region of the semiconductor layer. The channel region can be disposed between the gate dielectric layer and the dielectric portion. The channel region can be longitudinally disposed between the source region and the drain region. The transistor can further include a conductive gate electrode disposed on the gate dielectric layer.

    EDGE SEALS FOR SEMICONDUCTOR PACKAGES

    公开(公告)号:US20250151431A1

    公开(公告)日:2025-05-08

    申请号:US19013861

    申请日:2025-01-08

    Abstract: Implementations of semiconductor packages may include: a digital signal processor having a first side and a second side and an image sensor array, having a first side and a second side. The first side of the image sensor array may be coupled to the second side of the digital signal processor through a plurality of hybrid bond interconnect (HBI) bond pads and an edge seal. One or more openings may extend from the second side of the image sensor array into the second side of the digital signal processor to an etch stop layer in the second side of the digital signal processor. The one or more openings may form a second edge seal between the plurality of HBI bond pads and the edge of the digital signal processor.

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