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    Insulated gated field effect transistor structure having shielded source and method
    1.
    发明授权
    Insulated gated field effect transistor structure having shielded source and method 有权

    公开(公告)号：US10784373B1

    公开(公告)日：2020-09-22

    申请号：US16515334

    申请日：2019-07-18

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Xiaoli Wu ,  Joseph Andrew Yedinak

    IPC: H01L29/78 ,  H01L27/07 ,  H01L29/10

    Abstract: A semiconductor device includes a region of semiconductor material comprising a semiconductor layer of a first conductivity type and having a first major surface. A body region of a second conductivity type opposite to the first conductivity type is disposed in the second semiconductor layer extending from the first major surface. The body region comprises a first segment having a first doping concentration, and a second segment laterally adjacent to the first segment and adjacent to the first major surface having a second doping concentration less than the first doping concentration. A source region of the first conductivity type is disposed in the first segment but is not disposed in at least a portion of the second segment. An insulated gate electrode is disposed adjacent to the region of semiconductor material adjoining the first segment, the second segment, and the source region. A conductive layer is electrically connected to the first segment, the second segment, and the first source region. During a linear mode of operation, current flows first in the second segment but not in the first segment to reduce the likelihood of thermal runaway.

    Shield indent trench termination for shielded gate MOSFETs
    2.
    发明授权
    Shield indent trench termination for shielded gate MOSFETs 有权

    公开(公告)号：US10374076B2

    公开(公告)日：2019-08-06

    申请号：US15639961

    申请日：2017-06-30

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Xiaoli Wu ,  Joseph Yedinak

    IPC: H01L29/78 ,  H01L29/40 ,  H01L29/06 ,  H01L29/41

    Abstract: In a general aspect, a power semiconductor device can include a semiconductor region having an active region and a termination region. The device can also include a plurality of trench shield electrodes each having a first portion disposed in the active region and a second portion disposed in the termination region. One or more of the trench shield electrodes can have a second portion that extends a first distance into the termination region, while one or more other trench shield electrodes can have a second portion that extends a second distance into the termination region, the second distance being less than the first distance. The trench shield electrode(s) having the second portion that extends the second distance into the termination region can be interleaved with the trench shield electrode(s) having the second portion that extends the first distance into the termination region.

    Termination implant enrichment for shielded gate MOSFETS
    4.
    发明授权
    Termination implant enrichment for shielded gate MOSFETS 有权

    公开(公告)号：US10446640B2

    公开(公告)日：2019-10-15

    申请号：US16257866

    申请日：2019-01-25

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Joseph Yedinak ,  Xiaoli Wu

    IPC: H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L29/66

    Abstract: In a general aspect, a power semiconductor device can include a first trench shield electrode and a second trench shield electrode defined in a semiconductor region, the first and second trench shield electrodes each having a first portion disposed in an active region and a second portion disposed in a termination region. A trench of the first trench shield electrode and a trench of the second trench shield electrode can define a mesa of the semiconductor region therebetween. The device can further include an implant enrichment region disposed in the termination region, the implant enrichment region can have a plurality of segments, at least one of the segments being disposed in the mesa. The trench shield electrodes can be disposed between segments of the implant enrichment region.

    INSULATED GATED FIELD EFFECT TRANSISTOR STRUCTURE HAVING SHIELDED SOURCE AND METHOD
    5.
    发明申请
    INSULATED GATED FIELD EFFECT TRANSISTOR STRUCTURE HAVING SHIELDED SOURCE AND METHOD 审中-公开

    公开(公告)号：US20200295189A1

    公开(公告)日：2020-09-17

    申请号：US16515334

    申请日：2019-07-18

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Xiaoli Wu ,  Joseph Andrew YEDINAK

    IPC: H01L29/78 ,  H01L29/10 ,  H01L27/07

    Abstract: A semiconductor device includes a region of semiconductor material comprising a semiconductor layer of a first conductivity type and having a first major surface. A body region of a second conductivity type opposite to the first conductivity type is disposed in the second semiconductor layer extending from the first major surface. The body region comprises a first segment having a first doping concentration, and a second segment laterally adjacent to the first segment and adjacent to the first major surface having a second doping concentration less than the first doping concentration. A source region of the first conductivity type is disposed in the first segment but is not disposed in at least a portion of the second segment. An insulated gate electrode is disposed adjacent to the region of semiconductor material adjoining the first segment, the second segment, and the source region. A conductive layer is electrically connected to the first segment, the second segment, and the first source region. During a linear mode of operation, current flows first in the second segment but not in the first segment to reduce the likelihood of thermal runaway.

    Termination implant enrichment for shielded gate MOSFETs
    6.
    发明授权
    Termination implant enrichment for shielded gate MOSFETs 有权

    公开(公告)号：US10236340B2

    公开(公告)日：2019-03-19

    申请号：US15581774

    申请日：2017-04-28

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Joseph Yedinak ,  Xiaoli Wu

    IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/10

    Abstract: In a general aspect, a power semiconductor device can include a first trench shield electrode and a second trench shield electrode defined in a semiconductor region, the first and second trench shield electrodes each having a first portion disposed in an active region and a second portion disposed in a termination region. A trench of the first trench shield electrode and a trench of the second trench shield electrode can define a mesa of the semiconductor region therebetween. The device can further include an implant enrichment region disposed in the termination region, the implant enrichment region can be intersected by the first trench shield electrode and the second trench shield electrode, and can have a portion disposed in the mesa of the semiconductor region, the portion extending from the trench of the first trench shield electrode to the trench of the second trench shield electrode.

    Insulated gated field effect transistor structure having shielded source and method
    8.
    发明授权
    Insulated gated field effect transistor structure having shielded source and method 有权

    公开(公告)号：US11637201B2

    公开(公告)日：2023-04-25

    申请号：US17456266

    申请日：2021-11-23

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Xiaoli Wu ,  Joseph Andrew Yedinak

    IPC: H01L29/78 ,  H01L27/07 ,  H01L29/10

    Abstract: A semiconductor device includes a region of semiconductor material of a first conductivity type and having a first major surface. A body region of a second conductivity type opposite to the first conductivity type is in the region of semiconductor material. The body region includes a stripe region; a first segment in the stripe region and having a first peak dopant concentration, a first depth into the region of semiconductor material, and a first length along the first major surface; and a second segment in the stripe region laterally adjacent to the first segment, adjacent to the first major surface, and having a second peak dopant concentration, a second depth into the region of semiconductor material, and a second length along the first major surface. A source region of the first conductivity type is in the first segment but not in at least part of the second segment. An insulated gate electrode adjoins the first segment and is configured to provide a first channel region in the first segment, adjoins the second segment and configured to provide a second channel region in the second segment, and adjoins the first source region. A conductive structure is connected to the first segment, the second segment, and the source region. During a linear mode of operation, current flows first in the second segment but not in the first segment to reduce the likelihood of thermal runaway.

    Insulated gated field effect transistor structure having shielded source and method
    9.
    发明授权
    Insulated gated field effect transistor structure having shielded source and method 有权

    公开(公告)号：US11222976B2

    公开(公告)日：2022-01-11

    申请号：US16947586

    申请日：2020-08-07

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Xiaoli Wu ,  Joseph Andrew Yedinak

    IPC: H01L29/78 ,  H01L27/07 ,  H01L29/10

    Abstract: A semiconductor device includes a region of semiconductor material comprising a semiconductor layer of a first conductivity type and having a first major surface. A body region of a second conductivity type opposite to the first conductivity type is disposed in the second semiconductor layer extending from the first major surface. The body region comprises a first segment having a first doping concentration, and a second segment laterally adjacent to the first segment and adjacent to the first major surface having a second doping concentration less than the first doping concentration. A source region of the first conductivity type is disposed in the first segment but is not disposed in at least a portion of the second segment. An insulated gate electrode is disposed adjacent to the region of semiconductor material adjoining the first segment, the second segment, and the source region. A conductive layer is electrically connected to the first segment, the second segment, and the first source region. During a linear mode of operation, current flows first in the second segment but not in the first segment to reduce the likelihood of thermal runaway.

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