公开(公告)号：US20190325969A1

公开(公告)日：2019-10-24

申请号：US16201280

申请日：2018-11-27

Applicant: SK hynix Inc.

Inventor： Jiman HONG

IPC: G11C16/26 ,  G11C16/10 ,  G06F11/10 ,  G11C29/52

Abstract: A memory system includes: a memory device configured to store data, and read and output the stored data in a read operation; and a memory controller configured to perform an error correction operation on the data received from the memory device in the read operation and control the memory device to perform a read retry operation, based on the result of the error correction operation, wherein the memory device outputs the data in the read retry operation to the memory controller when the number of specific data, among data read in the read retry operation, is in a set range.

公开(公告)号：US20200065025A1

公开(公告)日：2020-02-27

申请号：US16365957

申请日：2019-03-27

Applicant: SK hynix Inc.

Inventor： Jiman HONG

IPC: G06F3/06

Abstract: A memory controller transferring first program data to a semiconductor memory device to control a program operation of the semiconductor memory device may include a buffer memory and a data change detector. The buffer memory may store second program data received from the semiconductor memory device after the first program data is transferred. The data change detector may determine whether the first data transferred to the semiconductor memory device is changed by analyzing the second program data.

公开(公告)号：US20190018594A1

公开(公告)日：2019-01-17

申请号：US15878855

申请日：2018-01-24

Applicant: SK hynix Inc.

Inventor： Jiman HONG

IPC: G06F3/06

Abstract: A memory system includes: a nonvolatile memory device suitable for performing a program operation to a page according to an incremental step pulse program scheme, and counting an actual application number of a program pulse for the program operation; and a controller suitable for controlling the nonvolatile memory device to perform the program operation, and reflecting the actual application number to a reference application number of the program pulse for the program operation, which is initially stored in the nonvolatile memory device at a manufacturing phase of the memory system, wherein the nonvolatile memory device determines a failure of the program operation based on a maximum application number of the program pulse for the program operation, which is greater than the reference application number by a predetermined number.

公开(公告)号：US20210181952A1

公开(公告)日：2021-06-17

申请号：US16915632

申请日：2020-06-29

Applicant: SK hynix Inc.

Inventor： Gi Bbeum HAN ,  Kyung Bum KIM ,  Jiman HONG

IPC: G06F3/06

Abstract: A memory system, and a method of operating the memory system, includes a memory device including a plurality of memory blocks. The memory system also includes a memory controller for controlling the memory device to perform a data copy operation of moving and storing valid data stored in a selected memory block among the plurality of memory blocks in a target block among the plurality of memory blocks. The memory controller is configured to control the memory device to perform the data copy operation by preferentially selecting a weak page among a plurality of pages included in the selected memory block rather than the other pages.

公开(公告)号：US20210132803A1

公开(公告)日：2021-05-06

申请号：US16917739

申请日：2020-06-30

Applicant: SK hynix Inc.

Inventor： Jiman HONG

IPC: G06F3/06 ,  G06F12/02

Abstract: A memory controller, for controlling a memory device including a plurality of memory blocks, includes a garbage collection controller configured to determine candidate blocks in which valid data is equal to or less than a predetermined ratio among the plurality of memory blocks, and configured to determine at least two or more memory blocks as victim blocks among the candidate blocks based on information on blocks that may be simultaneously erased among the plurality of memory blocks. The memory controller also includes an operation controller configured to control the memory device to copy valid data stored in the victim blocks to a different memory block.

公开(公告)号：US20180374545A1

公开(公告)日：2018-12-27

申请号：US15895539

申请日：2018-02-13

Applicant: SK hynix Inc.

Inventor： Jiman HONG

IPC: G11C16/34 ,  G11C16/24 ,  G11C16/08 ,  G11C16/26 ,  G11C16/04

CPC classification number: G11C16/3404 ,  G11C11/5621 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/3459

Abstract: A data storage device includes a controller suitable for transmitting a search command; and a nonvolatile memory device suitable for performing an erase page search operation of searching for an erased page among a plurality of pages based on the command, and transmitting information regarding a searched page to the controller.

公开(公告)号：US20210383862A1

公开(公告)日：2021-12-09

申请号：US17036853

申请日：2020-09-29

Applicant: SK hynix Inc.

Inventor： Jiman HONG

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/34

Abstract: The present technology relates to an electronic device. More specifically, the present technology relates to a storage device and a method of operating the same. A memory device according to an embodiment includes a memory cell array including a plurality of memory cells, a peripheral circuit configured to perform a program operation, a program verifier configured to calculate difference values, each of which is between a first pass loop count and a second pass loop count of a respective one of program states, when the program operation is completed, and output a pass status or a fail status according to whether at least one of the difference values exceeds a reference value.

公开(公告)号：US20210132804A1

公开(公告)日：2021-05-06

申请号：US16922778

申请日：2020-07-07

Applicant: SK hynix Inc.

Inventor： Jiman HONG

IPC: G06F3/06 ,  G06F11/07

Abstract: A memory controller including a search operation manager. The search operation manager counts a number of times an optimum read voltage search operation is performed on the plurality of memory blocks, and determines a target block in which the number of times the optimum read voltage search operation is performed exceeds a reference number of times. The block manager sets the target block as a bad block.

公开(公告)号：US20190295659A1

公开(公告)日：2019-09-26

申请号：US16238688

申请日：2019-01-03

Applicant: SK hynix Inc.

Inventor： Jiman HONG ,  Tae Hoon KIM

IPC: G11C16/26 ,  G06F11/10 ,  G11C29/52

Abstract: The memory controller includes a command generator generating first read commands respectively corresponding to each of a plurality of read voltages having different levels and transferring the first read commands to a memory device so that first read operation is performed plural times on a plurality of memory cells for each of the read voltages, and an inverted cell counter determining inverted cells showing different bit values during the first read operation performed plural times for each read voltage on the basis of read result data received from the memory device.

公开(公告)号：US20210191656A1

公开(公告)日：2021-06-24

申请号：US16909348

申请日：2020-06-23

Applicant: SK hynix Inc.

Inventor： Jiman HONG

IPC: G06F3/06 ,  G06F7/58 ,  H03K3/84 ,  G11C16/04 ,  G11C16/26 ,  G11C16/10

Abstract: A memory controller for controlling an operation of a semiconductor memory device including a memory block including a plurality of sub-blocks. The memory controller includes a randomizer. The randomizer includes: seed table storage configured to store a plurality of seed tables respectively corresponding to the plurality of sub-blocks, and to generate a seed, based on sub-block information of received original data; a random sequence generator configured to generate a random sequence, based on the seed generated by the seed table storage; and an operating component configured to generate random data, based on the random sequence and the original data.