公开(公告)号：US20190259839A1

公开(公告)日：2019-08-22

申请号：US16119424

申请日：2018-08-31

申请人： SK hynix Inc.

发明人： Seong-Wan RYU

IPC分类号： H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L21/324

摘要： A semiconductor device includes: a substrate; a first source/drain region and a second source/drain region spaced apart from each other by a trench in the substrate; and a gate structure in the trench, wherein the gate structure includes: a gate dielectric layer formed on a bottom and sidewalls of the trench; a first gate electrode positioned in a bottom portion of the trench over the gate dielectric layer; a second gate electrode positioned over the first gate electrode; and a dipole inducing layer formed between the first gate electrode and the second gate electrode and between sidewalls of the second gate electrode and the gate dielectric layer.

公开(公告)号：US20240213320A1

公开(公告)日：2024-06-27

申请号：US18420777

申请日：2024-01-24

申请人： SK hynix Inc.

发明人： Seong-Wan RYU

IPC分类号： H01L29/08 ,  H01L21/324 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/0873 ,  H01L21/324 ,  H01L29/4236 ,  H01L29/66734 ,  H01L29/7813

摘要： A semiconductor device includes: a substrate; a first source/drain region and a second source/drain region spaced apart from each other by a trench in the substrate; and a gate structure in the trench, wherein the gate structure includes: a gate dielectric layer formed on a bottom and sidewalls of the trench; a first gate electrode positioned in a bottom portion of the trench over the gate dielectric layer; a second gate electrode positioned over the first gate electrode; and a dipole inducing layer formed between the first gate electrode and the second gate electrode and between sidewalls of the second gate electrode and the gate dielectric layer.

公开(公告)号：US20200335584A1

公开(公告)日：2020-10-22

申请号：US16919368

申请日：2020-07-02

申请人： SK hynix Inc.

发明人： Seong-Wan RYU

IPC分类号： H01L29/08 ,  H01L29/423 ,  H01L21/324 ,  H01L29/78 ,  H01L29/66

摘要： A semiconductor device includes: a substrate; a first source/drain region and a second source/drain region spaced apart from each other by a trench in the substrate; and a gate structure in the trench, wherein the gate structure includes: a gate dielectric layer formed on a bottom and sidewalls of the trench; a first gate electrode positioned in a bottom portion of the trench over the gate dielectric layer; a second gate electrode positioned over the first gate electrode; and a dipole inducing layer formed between the first gate electrode and the second gate electrode and between sidewalls of the second gate electrode and the gate dielectric layer.

公开(公告)号：US20220293734A1

公开(公告)日：2022-09-15

申请号：US17829581

申请日：2022-06-01

申请人： SK hynix Inc.

发明人： Seong-Wan RYU

IPC分类号： H01L29/08 ,  H01L29/423 ,  H01L21/324 ,  H01L29/78 ,  H01L29/66

摘要： A semiconductor device includes: a substrate; a first source/drain region and a second source/drain region spaced apart from each other by a trench in the substrate; and a gate structure in the trench, wherein the gate structure includes: a gate dielectric layer formed on a bottom and sidewalls of the trench; a first gate electrode positioned in a bottom portion of the trench over the gate dielectric layer; a second gate electrode positioned over the first gate electrode; and a dipole inducing layer formed between the first gate electrode and the second gate electrode and between sidewalls of the second gate electrode and the gate dielectric layer.

公开(公告)号：US20190244820A1

公开(公告)日：2019-08-08

申请号：US16383082

申请日：2019-04-12

申请人： SK hynix Inc.

发明人： Tae-Su JANG ,  Jin-Chul PARK ,  Ji-Hwan PARK ,  Il-Sik JANG ,  Seong-Wan RYU ,  Se-In KWON ,  Jung-Ho SHIN ,  Dae-Jin HAM

IPC分类号： H01L21/28 ,  H01L27/22 ,  H01L27/24 ,  H01L43/12 ,  H01L45/00 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/66

CPC分类号： H01L21/28088 ,  H01L21/26586 ,  H01L21/28114 ,  H01L27/10805 ,  H01L27/10861 ,  H01L27/228 ,  H01L27/2454 ,  H01L29/4236 ,  H01L29/4966 ,  H01L29/66621 ,  H01L29/66666 ,  H01L29/78 ,  H01L29/7827 ,  H01L43/12 ,  H01L45/04 ,  H01L45/06 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/16

摘要： A method for fabricating a semiconductor device includes: forming a gate trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the gate trench; forming a first work function layer over the gate dielectric layer; doping a work function adjustment element to form a second work function layer which overlaps with the sidewalls of the gate trench; forming a gate conductive layer that partially fills the gate trench; and forming doped regions inside the semiconductor substrate on both sides of the gate trench.

公开(公告)号：US20180174845A1

公开(公告)日：2018-06-21

申请号：US15713798

申请日：2017-09-25

申请人： SK hynix Inc.

发明人： Tae-Su JANG ,  Jin-Chul PARK ,  Ji-Hwan PARK ,  Il-Sik JANG ,  Seong-Wan RYU ,  Se-In KWON ,  Jung-Ho SHIN ,  Dae-Jin HAM

IPC分类号： H01L21/28 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/28088 ,  H01L27/10805 ,  H01L27/10861 ,  H01L27/228 ,  H01L27/2454 ,  H01L29/4236 ,  H01L29/4966 ,  H01L29/66666 ,  H01L29/7827 ,  H01L43/12 ,  H01L45/04 ,  H01L45/06 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/16

摘要： A method for fabricating a semiconductor device includes: forming a gate trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the gate trench; forming a first work function layer over the gate dielectric layer; doping a work function adjustment element to form a second work function layer which overlaps with the sidewalls of the gate trench; forming a gate conductive layer that partially fills the gate trench; and forming doped regions inside the semiconductor substrate on both sides of the gate trench.