公开(公告)号：US09806040B2

公开(公告)日：2017-10-31

申请号：US15219098

申请日：2016-07-25

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Kai Liu ,  Yaojian Lin

IPC: H01L27/14 ,  H01L23/66 ,  H01L23/498 ,  H01L23/00 ,  H01L23/528 ,  H01L23/522 ,  H01L21/56 ,  H01L21/48 ,  H01L23/552

CPC classification number: H01L23/66 ,  H01L21/486 ,  H01L21/568 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5225 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/19 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2224/83005

Abstract: A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over a first surface of the encapsulant. A second conductive layer is formed with a ground plane over a second surface of the encapsulant with the antenna located within a footprint of the ground plane. A conductive bump is formed on the ground plane. A third conductive layer is formed over the first surface of the encapsulant. A fourth conductive layer is formed over the second surface of the encapsulant. A conductive via is disposed adjacent to the semiconductor die prior to depositing the encapsulant. The antenna is coupled to the semiconductor die through the conductive via. The antenna is formed with the conductive via between the antenna and semiconductor die. A PCB unit is disposed in the encapsulant.

公开(公告)号：US20170033062A1

公开(公告)日：2017-02-02

申请号：US15219098

申请日：2016-07-25

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Kai Liu ,  Yaojian Lin

IPC: H01L23/66 ,  H01L23/00 ,  H01L21/48 ,  H01L23/528 ,  H01L23/522 ,  H01L21/56 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L23/66 ,  H01L21/486 ,  H01L21/568 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5225 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/19 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2224/83005

Abstract: A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over a first surface of the encapsulant. A second conductive layer is formed with a ground plane over a second surface of the encapsulant with the antenna located within a footprint of the ground plane. A conductive bump is formed on the ground plane. A third conductive layer is formed over the first surface of the encapsulant. A fourth conductive layer is formed over the second surface of the encapsulant. A conductive via is disposed adjacent to the semiconductor die prior to depositing the encapsulant. The antenna is coupled to the semiconductor die through the conductive via. The antenna is formed with the conductive via between the antenna and semiconductor die. A PCB unit is disposed in the encapsulant.

Abstract translation: 半导体器件具有沉积在半导体管芯上的半导体管芯和密封剂。 第一导电层在密封剂的第一表面上形成有天线。 第二导电层在密封剂的第二表面上形成有接地平面，天线位于接地平面的覆盖区内。 导电凸块形成在接地平面上。 在密封剂的第一表面上形成第三导电层。 在密封剂的第二表面上形成第四导电层。 在沉积密封剂之前，导电通孔邻近半导体管芯设置。 天线通过导电通孔耦合到半导体管芯。 天线由天线和半导体管芯之间的导电通孔形成。 PCB单元设置在密封剂中。

公开(公告)号：US10211171B2

公开(公告)日：2019-02-19

申请号：US15705078

申请日：2017-09-14

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Kai Liu ,  Yaojian Lin

IPC: H01L23/66 ,  H01L23/498 ,  H01L23/00 ,  H01L23/528 ,  H01L23/522 ,  H01L21/56 ,  H01L21/48 ,  H01L23/552 ,  H01L23/538

Abstract: A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over a first surface of the encapsulant. A second conductive layer is formed with a ground plane over a second surface of the encapsulant with the antenna located within a footprint of the ground plane. A conductive bump is formed on the ground plane. A third conductive layer is formed over the first surface of the encapsulant. A fourth conductive layer is formed over the second surface of the encapsulant. A conductive via is disposed adjacent to the semiconductor die prior to depositing the encapsulant. The antenna is coupled to the semiconductor die through the conductive via. The antenna is formed with the conductive via between the antenna and semiconductor die. A PCB unit is disposed in the encapsulant.

公开(公告)号：US20180012851A1

公开(公告)日：2018-01-11

申请号：US15705078

申请日：2017-09-14

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Kai Liu ,  Yaojian Lin

IPC: H01L23/66 ,  H01L23/498 ,  H01L23/528 ,  H01L21/48 ,  H01L23/552 ,  H01L23/00 ,  H01L21/56 ,  H01L23/522

CPC classification number: H01L23/66 ,  H01L21/486 ,  H01L21/568 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5225 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/19 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2224/83005

Abstract: A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over a first surface of the encapsulant. A second conductive layer is formed with a ground plane over a second surface of the encapsulant with the antenna located within a footprint of the ground plane. A conductive bump is formed on the ground plane. A third conductive layer is formed over the first surface of the encapsulant. A fourth conductive layer is formed over the second surface of the encapsulant. A conductive via is disposed adjacent to the semiconductor die prior to depositing the encapsulant. The antenna is coupled to the semiconductor die through the conductive via. The antenna is formed with the conductive via between the antenna and semiconductor die. A PCB unit is disposed in the encapsulant.