公开(公告)号：US20200035619A1

公开(公告)日：2020-01-30

申请号：US16458559

申请日：2019-07-01

Applicant: STMicroelectronics, Inc.

Inventor： Freddie FOLIO ,  Michael TABIERA ,  Edwin GRAYCOCHEA, JR.

IPC: H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  G06K19/07

Abstract: The present disclosure is directed to a micro module with a support structure. The micro module includes a carrier substrate having contacts and a bonding pad, a semiconductor die, and a support structure. The semiconductor die is positioned on the bonding pad and is electrically coupled to the contacts. The support structure is positioned on the bonding pad and adjacent to the semiconductor die. The support structure reinforces the bonding pad such that the bonding pad is more rigid than flexible. As a result, an external force applied to the micro module is less likely to cause the micro module to bend and damage the semiconductor die.

公开(公告)号：US20170186698A1

公开(公告)日：2017-06-29

申请号：US14982018

申请日：2015-12-29

Applicant: STMICROELECTRONICS, INC.

Inventor： Godfrey DIMAYUGA ,  Frederick ARELLANO ,  Michael TABIERA

IPC: H01L23/552 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/43 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48249 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/45099 ,  H01L2224/32245 ,  H01L2224/48247

Abstract: An electronic package includes a substrate having opposing first and second surfaces. Conductive areas are on a first surface of the substrate and include at least one edge conductive area. A plurality of conductive bumps are on the second surface of the substrate and coupled to respective ones of the conductive areas. An integrated circuit (IC) is carried by the substrate. Bond wires are coupled between the IC and respective ones of the conductive areas. An encapsulating material is over the IC and adjacent portions of the substrate. A conductive layer is on the encapsulating material, and at least one conductive body is coupled between the at least one edge conductive area and the conductive layer.

公开(公告)号：US20220005782A1

公开(公告)日：2022-01-06

申请号：US17479988

申请日：2021-09-20

Applicant: STMicroelectronics, Inc.

Inventor： Rennier RODRIGUEZ ,  Rammil SEGUIDO ,  Raymond Albert NARVADEZ ,  Michael TABIERA

IPC: H01L23/00 ,  H01L23/495

Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.