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    POSITIVE AND NEGATIVE CHARGE PUMP CONTROL
    4.
    发明公开
    POSITIVE AND NEGATIVE CHARGE PUMP CONTROL 审中-公开

    公开(公告)号：US20230198386A1

    公开(公告)日：2023-06-22

    申请号：US18168936

    申请日：2023-02-14

    Applicant: STMicroelectronics International N.V. ,  STMicroelectronics S.r.l.

    Inventor： Vikas Rana ,  Marco Pasotti ,  Fabio De Santis

    IPC: H02M3/07

    CPC classification number: H02M3/07 ,  G11C5/145

    Abstract: A voltage supply circuit and a method for controlling a voltage supply circuit are provided. The voltage supply circuit includes a positive charge pump stage that generates a positive voltage and a negative charge pump stage that generates a negative voltage. The voltage supply circuit also includes a control stage that compares a voltage representative of the negative voltage with a reference voltage and causes a slope of the positive voltage to decrease when the voltage representative of the negative voltage exceeds the reference voltage.

    REGULATOR OF A SENSE AMPLIFIER
    5.
    发明申请
    REGULATOR OF A SENSE AMPLIFIER 有权

    公开(公告)号：US20230110870A1

    公开(公告)日：2023-04-13

    申请号：US17490976

    申请日：2021-09-30

    Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics International N.V.

    Inventor： Laura Capecchi ,  Marcella Carissimi ,  Marco Pasotti ,  Vikas Rana ,  Vivek Tyagi

    IPC: G11C7/06 ,  G11C7/14

    Abstract: A system and method for operating a memory cell is provided. A non-volatile memory storage device includes an array of memory cells of differential or single-ended type. In an embodiment, a regulator is coupled to a sense amplifier. The regulator is configured to generate a voltage to gate terminals of one or two transistors of the sense amplifier. In the differential type, the voltage is generated such that the first bias current and the second bias current have a current value equal to the sum of a maximum current flowing in a memory cell being in a RESET state and a fixed current. In the single-ended type, the regulated voltage is generated such that the first bias current and the second bias current have a current value equal to the sum of a fixed current and the reference current generated by the reference current source across temperature.

    POSITIVE AND NEGATIVE CHARGE PUMP CONTROL
    6.
    发明申请
    POSITIVE AND NEGATIVE CHARGE PUMP CONTROL 有权

    公开(公告)号：US20220352817A1

    公开(公告)日：2022-11-03

    申请号：US17866372

    申请日：2022-07-15

    Applicant: STMicroelectronics International N.V. ,  STMicroelectronics S.r.l.

    Inventor： Vikas Rana ,  Marco Pasotti ,  Fabio De Santis

    IPC: H02M3/07

    Abstract: A voltage supply circuit and a method for controlling a voltage supply circuit are provided. The voltage supply circuit includes a positive charge pump stage that generates a positive voltage and a negative charge pump stage that generates a negative voltage. The voltage supply circuit also includes a control stage that compares a voltage representative of the negative voltage with a reference voltage and causes a slope of the positive voltage to decrease when the voltage representative of the negative voltage exceeds the reference voltage.

    Row decoder for non-volatile memory devices and related methods
    7.
    发明授权
    Row decoder for non-volatile memory devices and related methods 有权
    行解码器用于非易失性存储器件及相关方法

    公开(公告)号：US09466347B1

    公开(公告)日：2016-10-11

    申请号：US14971403

    申请日：2015-12-16

    Applicant: STMICROELECTRONICS S.R.L. ,  STMICROELECTRONICS INTERNATIONAL N.V.

    Inventor： Marco Pasotti ,  Vikas Rana

    IPC: G11C8/10 ,  G11C13/00

    CPC classification number: G11C8/10 ,  G11C8/08 ,  G11C13/0004 ,  G11C13/0028 ,  G11C13/004 ,  G11C13/0069

    Abstract: An integrated circuit includes an array of phase-change memory (PCM) cells, a plurality of wordlines coupled to the array of PCM cells, and a row decoder circuit coupled to the plurality of wordlines. The row decoder circuit includes a first low voltage logic gate and a first high voltage level shifter coupled to the first low voltage logic gate. The row decoder circuit also includes a second low voltage logic gate, a second high voltage level shifter coupled to the second low voltage logic gate, and a first low voltage logic circuit coupled to the second low voltage logic gate. In addition, the row decoder circuit includes a second low voltage logic circuit coupled to the second low voltage logic gate, and a low voltage wordline driver having an input coupled to the outputs of the first and second low voltage logic gates, and an output coupled to a selected wordline.

    Abstract translation: 集成电路包括相变存储器（PCM）单元的阵列，耦合到PCM单元阵列的多个字线以及耦合到多个字线的行解码器电路。 行解码器电路包括耦合到第一低电压逻辑门的第一低电压逻辑门和第一高电压电平移位器。 行解码器电路还包括第二低电压逻辑门，耦合到第二低电压逻辑门的第二高电压电平移位器和耦合到第二低电压逻辑门的第一低电压逻辑电路。 此外，行解码器电路包括耦合到第二低电压逻辑门的第二低电压逻辑电路和具有耦合到第一和第二低电压逻辑门的输出的输入的低电压字线驱动器，以及耦合到 到一个选定的字线。

    Positive and negative charge pump control
    9.
    发明授权
    Positive and negative charge pump control 有权

    公开(公告)号：US11611275B2

    公开(公告)日：2023-03-21

    申请号：US17866372

    申请日：2022-07-15

    Applicant: STMicroelectronics International N.V. ,  STMicroelectronics S.r.l.

    Inventor： Vikas Rana ,  Marco Pasotti ,  Fabio De Santis

    IPC: H02M3/07 ,  G11C5/14

    Abstract: A voltage supply circuit and a method for controlling a voltage supply circuit are provided. The voltage supply circuit includes a positive charge pump stage that generates a positive voltage and a negative charge pump stage that generates a negative voltage. The voltage supply circuit also includes a control stage that compares a voltage representative of the negative voltage with a reference voltage and causes a slope of the positive voltage to decrease when the voltage representative of the negative voltage exceeds the reference voltage.

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