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公开(公告)号:US11437309B2
公开(公告)日:2022-09-06
申请号:US16906425
申请日:2020-06-19
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Arrigoni
IPC: H01L23/498 , H01L21/48 , H01L23/495
Abstract: A leadframe for a semiconductor device includes an array of electrically-conductive leads. The electrically-conductive leads have mutually opposed lateral (vertical) surfaces. An electrically-insulating material is formed over the mutually lateral opposed surfaces to prevent short circuits between adjacent leads. The electrically-insulating material may further be provided at one or more of the opposed bottom and top surfaces of the electrically-conductive leads of the leadframe.
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2.
公开(公告)号:US09893001B2
公开(公告)日:2018-02-13
申请号:US15416546
申请日:2017-01-26
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Arrigoni , Alberto Da Dalt
IPC: H01L23/495 , H01L21/48 , H01L21/56 , H01L21/78 , H01L23/31 , H01L25/065
CPC classification number: H01L23/49575 , H01L21/4825 , H01L21/4842 , H01L21/4853 , H01L21/561 , H01L21/565 , H01L21/78 , H01L23/3107 , H01L23/3114 , H01L23/49503 , H01L23/49524 , H01L23/49541 , H01L25/0655 , H01L2924/181 , H01L2924/00012
Abstract: A semiconductor device includes a quadrilateral package with a first pair of opposed sides and a second pair of opposed sides. Both sides of the first pair of opposed sides are provided with electrical contact leads. Only one side of the second pair of opposed sides is provided with electrical contact leads. The side of the second pair of opposed sides without electrical contact leads is a leadless side. That side is not a molded side of the package, but rather is defined by a cut surface.
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3.
公开(公告)号:US20170141019A1
公开(公告)日:2017-05-18
申请号:US15161617
申请日:2016-05-23
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Arrigoni , Alberto Da Dalt
IPC: H01L23/495 , H01L21/48 , H01L21/56 , H01L23/31 , H01L21/78
CPC classification number: H01L23/49575 , H01L21/4825 , H01L21/4842 , H01L21/4853 , H01L21/561 , H01L21/565 , H01L21/78 , H01L23/3107 , H01L23/3114 , H01L23/49503 , H01L23/49524 , H01L23/49541 , H01L25/0655 , H01L2924/181 , H01L2924/00012
Abstract: A semiconductor device includes a quadrilateral package with a first pair of opposed sides and a second pair of opposed sides. Both sides of the first pair of opposed sides are provided with electrical contact leads. Only one side of the second pair of opposed sides is provided with electrical contact leads. The side of the second pair of opposed sides without electrical contact leads is a leadless side. That side is not a molded side of the package, but rather is defined by a cut surface.
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公开(公告)号:US11764134B2
公开(公告)日:2023-09-19
申请号:US16745043
申请日:2020-01-16
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Arrigoni , Giovanni Graziosi , Aurora Sanna
IPC: H01L23/495 , H01L21/48
CPC classification number: H01L23/49589 , H01L21/4825 , H01L23/4952 , H01L23/49503
Abstract: A semiconductor chip is mounted to a chip mounting portion of a leadframe which further includes and one or more leads in the leadframe arranged facing the chip mounting portion. The lead lies in a first plane and the chip mounting portion lies in a second plane, the first plane and the second plane mutually offset with a gap therebetween. An electrical component (such as a capacitor) is arranged on the chip mounting portion and extends vertically between the first plane and the second plane.
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公开(公告)号:US10049966B2
公开(公告)日:2018-08-14
申请号:US15356109
申请日:2016-11-18
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Arrigoni
IPC: H01L23/00 , H01L23/495 , H01L21/48 , H01L23/498
Abstract: A semiconductor device includes a leadframe that includes contact pins and a semiconductor die that has protruding connection formations. A flexible support member is disposed between the leadframe and the semiconductor die and supports the semiconductor die. The flexible support member has electrically conductive lines that extend between the leadframe and the semiconductor die. The electrically conductive lines of the flexible support member are electrically coupled with the contact pins of the leadframe and with the connection formations of the semiconductor die.
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6.
公开(公告)号:US09698087B2
公开(公告)日:2017-07-04
申请号:US15161617
申请日:2016-05-23
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Arrigoni , Alberto Da Dalt
IPC: H01L23/495 , H01L23/31 , H01L21/78 , H01L21/56 , H01L21/48
CPC classification number: H01L23/49575 , H01L21/4825 , H01L21/4842 , H01L21/4853 , H01L21/561 , H01L21/565 , H01L21/78 , H01L23/3107 , H01L23/3114 , H01L23/49503 , H01L23/49524 , H01L23/49541 , H01L25/0655 , H01L2924/181 , H01L2924/00012
Abstract: A semiconductor device includes a quadrilateral package with a first pair of opposed sides and a second pair of opposed sides. Both sides of the first pair of opposed sides are provided with electrical contact leads. Only one side of the second pair of opposed sides is provided with electrical contact leads. The side of the second pair of opposed sides without electrical contact leads is a leadless side. That side is not a molded side of the package, but rather is defined by a cut surface.
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公开(公告)号:US10522504B2
公开(公告)日:2019-12-31
申请号:US15175930
申请日:2016-06-07
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Pierangelo Magni , Alberto Arrigoni
IPC: H01L23/00
Abstract: In an embodiment, a semiconductor device includes: a mounting substrate having electrically conductive formations thereon, a semiconductor die coupled with the mounting substrate, the semiconductor die with electrical contact pillars facing towards the mounting substrate, an anisotropic conductive membrane between the semiconductor die and the mounting substrate, the membrane compressed between the electrical contact pillars and the mounting substrate to provide electrical contact between the electrical contact pillars of the semiconductor die and the electrically conductive formations on the mounting substrate.
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公开(公告)号:US20170309548A1
公开(公告)日:2017-10-26
申请号:US15356109
申请日:2016-11-18
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Arrigoni
IPC: H01L23/495 , H01L23/498 , H01L23/00 , H01L21/48
CPC classification number: H01L23/49506 , H01L21/4825 , H01L23/49524 , H01L23/49527 , H01L23/49548 , H01L23/49805 , H01L23/4985 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/14505 , H01L2224/16225 , H01L2224/81203 , H01L2224/81207 , H01L2224/8182 , H01L2924/14 , H01L2924/18161 , H01L2924/014 , H01L2924/00014
Abstract: A semiconductor device includes a leadframe that includes contact pins and a semiconductor die that has protruding connection formations. A flexible support member is disposed between the leadframe and the semiconductor die and supports the semiconductor die. The flexible support member has electrically conductive lines that extend between the leadframe and the semiconductor die. The electrically conductive lines of the flexible support member are electrically coupled with the contact pins of the leadframe and with the connection formations of the semiconductor die.
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9.
公开(公告)号:US20170140944A1
公开(公告)日:2017-05-18
申请号:US15416546
申请日:2017-01-26
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Arrigoni , Alberto Da Dalt
IPC: H01L21/48 , H01L21/78 , H01L25/065 , H01L23/495
CPC classification number: H01L23/49575 , H01L21/4825 , H01L21/4842 , H01L21/4853 , H01L21/561 , H01L21/565 , H01L21/78 , H01L23/3107 , H01L23/3114 , H01L23/49503 , H01L23/49524 , H01L23/49541 , H01L25/0655 , H01L2924/181 , H01L2924/00012
Abstract: A semiconductor device includes a quadrilateral package with a first pair of opposed sides and a second pair of opposed sides. Both sides of the first pair of opposed sides are provided with electrical contact leads. Only one side of the second pair of opposed sides is provided with electrical contact leads. The side of the second pair of opposed sides without electrical contact leads is a leadless side. That side is not a molded side of the package, but rather is defined by a cut surface.
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